convert _mm256_maskz_dbsad_epu8 to const generics
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1 changed files with 7 additions and 11 deletions
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@ -7958,17 +7958,13 @@ pub unsafe fn _mm256_mask_dbsad_epu8<const IMM8: i32>(
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_maskz_dbsad_epu8&expand=2113)
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#[inline]
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#[target_feature(enable = "avx512bw,avx512vl")]
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#[rustc_args_required_const(3)]
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#[cfg_attr(test, assert_instr(vdbpsadbw, imm8 = 0))]
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pub unsafe fn _mm256_maskz_dbsad_epu8(k: __mmask16, a: __m256i, b: __m256i, imm8: i32) -> __m256i {
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#[rustc_legacy_const_generics(3)]
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#[cfg_attr(test, assert_instr(vdbpsadbw, IMM8 = 0))]
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pub unsafe fn _mm256_maskz_dbsad_epu8<const IMM8: i32>(k: __mmask16, a: __m256i, b: __m256i) -> __m256i {
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static_assert_imm8!(IMM8);
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let a = a.as_u8x32();
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let b = b.as_u8x32();
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macro_rules! call {
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($imm8:expr) => {
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vdbpsadbw256(a, b, $imm8)
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};
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}
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let r = constify_imm8_sae!(imm8, call);
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let r = vdbpsadbw256(a, b, IMM8);
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transmute(simd_select_bitmask(
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k,
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r,
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@ -16905,9 +16901,9 @@ mod tests {
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unsafe fn test_mm256_maskz_dbsad_epu8() {
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let a = _mm256_set1_epi8(2);
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let b = _mm256_set1_epi8(4);
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let r = _mm256_maskz_dbsad_epu8(0, a, b, 0);
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let r = _mm256_maskz_dbsad_epu8::<0>(0, a, b);
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assert_eq_m256i(r, _mm256_setzero_si256());
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let r = _mm256_maskz_dbsad_epu8(0b11111111_11111111, a, b, 0);
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let r = _mm256_maskz_dbsad_epu8::<0>(0b11111111_11111111, a, b);
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let e = _mm256_set1_epi16(8);
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assert_eq_m256i(r, e);
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}
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