From d9a67ea9225cf90dee16b7684b05ff7dd16bcc69 Mon Sep 17 00:00:00 2001 From: Daniel Verkamp Date: Tue, 28 Apr 2020 17:50:13 -0700 Subject: [PATCH] Manually preserve rbx across cpuid instruction (#851) * Manually preserve rbx across cpuid instruction This fixes an issue observed when using __cpuid and __cpuid_count with Address Sanitizer enabled: the generated code uses the rbx register to access ASAN tracking information without reloading it after cpuid, resulting in a segfault since the rbx register is overwritten by cpuid (https://crbug.com/1072045). This seems like a compiler backend bug, and indeed there is a long-standing LLVM bug report about a very similar issue: https://bugs.llvm.org/show_bug.cgi?id=17907 To work around this issue, we can manually preserve the rbx register contents in the inline assembly. This is the approach taken by LLVM's own host cpuid detection code (lib/Host/Support.cpp). The original rbx value is stashed in rsi, which is then swapped with rbx to restore the original value as well as keep the output ebx value from the CPUID instruction to be used as an output of the inline assembly. The rbx clobber is also removed; this seems ineffective, and it conflicts with the ebx output of the inline assembly (ebx is a subregister of rbx): "Note that clobbering named registers that are also present in output constraints is not legal." (https://llvm.org/docs/LangRef.html#clobber-constraints) * Add link to LLVM bug in cpuid workaround comment --- library/stdarch/crates/core_arch/src/x86/cpuid.rs | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/library/stdarch/crates/core_arch/src/x86/cpuid.rs b/library/stdarch/crates/core_arch/src/x86/cpuid.rs index 5291aca0924d..f292ae7b54de 100644 --- a/library/stdarch/crates/core_arch/src/x86/cpuid.rs +++ b/library/stdarch/crates/core_arch/src/x86/cpuid.rs @@ -65,10 +65,16 @@ pub unsafe fn __cpuid_count(leaf: u32, sub_leaf: u32) -> CpuidResult { #[cfg(target_arch = "x86_64")] { // x86-64 uses %rbx as the base register, so preserve it. - llvm_asm!("cpuid" - : "={eax}"(eax), "={ebx}"(ebx), "={ecx}"(ecx), "={edx}"(edx) + // This works around a bug in LLVM with ASAN enabled: + // https://bugs.llvm.org/show_bug.cgi?id=17907 + llvm_asm!(r#" + mov %rbx, %rsi + cpuid + xchg %rbx, %rsi + "# + : "={eax}"(eax), "={esi}"(ebx), "={ecx}"(ecx), "={edx}"(edx) : "{eax}"(leaf), "{ecx}"(sub_leaf) - : "rbx" :); + : :); } CpuidResult { eax, ebx, ecx, edx } }