Degrade emitter size cache to just a flat hashtable with regular flushes (sigh) and re-introduce horrible bounce-off-spill hack for DIV, MUL, etc.

This commit is contained in:
Graydon Hoare 2010-08-05 17:44:35 -07:00
parent 9da8101cc8
commit db561b52ff
3 changed files with 73 additions and 33 deletions

View file

@ -695,7 +695,7 @@ type emitter = { mutable emit_pc: int;
emit_target_specific: (emitter -> quad -> unit);
mutable emit_quads: quads;
emit_annotations: (int,string) Hashtbl.t;
emit_size_cache: ((size,operand) Hashtbl.t) Stack.t;
emit_size_cache: (size,operand) Hashtbl.t;
emit_node: node_id option;
}
@ -722,7 +722,7 @@ let new_emitter
emit_target_specific = emit_target_specific;
emit_quads = Array.create 4 badq;
emit_annotations = Hashtbl.create 0;
emit_size_cache = Stack.create ();
emit_size_cache = Hashtbl.create 0;
emit_node = node;
}
;;

View file

@ -302,11 +302,41 @@ let emit_target_specific
| Il.IMOD | Il.UMOD ->
let dst_eax = hr_like_cell eax dst in
let lhs_eax = hr_like_op eax lhs in
let rhs_ecx = hr_like_op ecx lhs in
if lhs <> (Il.Cell lhs_eax)
then mov lhs_eax lhs;
if rhs <> (Il.Cell rhs_ecx)
then mov rhs_ecx rhs;
let rhs_ecx = hr_like_op ecx rhs in
(* Horrible: we bounce complex mul inputs off spill slots
* to ensure non-interference between the temporaries used
* during mem-base-reg reloads and the registers we're
* preparing. *)
let next_spill_like op =
Il.Mem (Il.next_spill_slot e
(Il.ScalarTy (Il.operand_scalar_ty op)))
in
let is_mem op =
match op with
Il.Cell (Il.Mem _) -> true
| _ -> false
in
let bounce_lhs = is_mem lhs in
let bounce_rhs = is_mem rhs in
let lhs_spill = next_spill_like lhs in
let rhs_spill = next_spill_like rhs in
if bounce_lhs
then mov lhs_spill lhs;
if bounce_rhs
then mov rhs_spill rhs;
mov lhs_eax
(if bounce_lhs
then (Il.Cell lhs_spill)
else lhs);
mov rhs_ecx
(if bounce_rhs
then (Il.Cell rhs_spill)
else rhs);
put (Il.Binary
{ b with
Il.binary_lhs = (Il.Cell lhs_eax);
@ -314,7 +344,7 @@ let emit_target_specific
Il.binary_dst = dst_eax; });
if dst <> dst_eax
then mov dst (Il.Cell dst_eax);
| _ when (Il.Cell dst) <> lhs ->
mov dst lhs;
put (Il.Binary