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fix codegen difference

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This commit is contained in:
Deadbeef 2023-04-17 08:22:16 +00:00
parent 99851c48cf
commit dd025c3b56
7 changed files with 88 additions and 34 deletions
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6
library/core/src/num/int_macros.rs
View file

@ -785,8 +785,7 @@ macro_rules! int_impl {
// SAFETY: the caller must uphold the safety contract for
// `unchecked_shl`.
// Any legal shift amount is losslessly representable in the self type.
// FIXME(const-hack) replace with `.try_into().ok().unwrap_unchecked()`.
unsafe { intrinsics::unchecked_shl(self, rhs as _) }
unsafe { intrinsics::unchecked_shl(self, conv_rhs_for_unchecked_shift!($SelfT, rhs)) }
}
/// Checked shift right. Computes `self >> rhs`, returning `None` if `rhs` is
@ -834,8 +833,7 @@ macro_rules! int_impl {
// SAFETY: the caller must uphold the safety contract for
// `unchecked_shr`.
// Any legal shift amount is losslessly representable in the self type.
// FIXME(const-hack) replace with `.try_into().ok().unwrap_unchecked()`.
unsafe { intrinsics::unchecked_shr(self, rhs as _) }
unsafe { intrinsics::unchecked_shr(self, conv_rhs_for_unchecked_shift!($SelfT, rhs)) }
}
/// Checked absolute value. Computes `self.abs()`, returning `None` if

18
library/core/src/num/mod.rs
View file

@ -3,6 +3,7 @@
#![stable(feature = "rust1", since = "1.0.0")]
use crate::ascii;
use crate::convert::TryInto;
use crate::intrinsics;
use crate::mem;
use crate::ops::{Add, Mul, Sub};
@ -224,6 +225,23 @@ macro_rules! widening_impl {
};
}
macro_rules! conv_rhs_for_unchecked_shift {
($SelfT:ty, $x:expr) => {{
#[inline]
fn conv(x: u32) -> $SelfT {
// FIXME(const-hack) replace with `.try_into().ok().unwrap_unchecked()`.
// SAFETY: Any legal shift amount must be losslessly representable in the self type.
unsafe { x.try_into().ok().unwrap_unchecked() }
}
#[inline]
const fn const_conv(x: u32) -> $SelfT {
x as _
}
intrinsics::const_eval_select(($x,), const_conv, conv)
}};
}
impl i8 {
int_impl! {
Self = i8,

6
library/core/src/num/uint_macros.rs
View file

@ -939,8 +939,7 @@ macro_rules! uint_impl {
// SAFETY: the caller must uphold the safety contract for
// `unchecked_shl`.
// Any legal shift amount is losslessly representable in the self type.
// FIXME(const-hack) replace with `.try_into().ok().unwrap_unchecked()`.
unsafe { intrinsics::unchecked_shl(self, rhs as _) }
unsafe { intrinsics::unchecked_shl(self, conv_rhs_for_unchecked_shift!($SelfT, rhs)) }
}
/// Checked shift right. Computes `self >> rhs`, returning `None`
@ -988,8 +987,7 @@ macro_rules! uint_impl {
// SAFETY: the caller must uphold the safety contract for
// `unchecked_shr`.
// Any legal shift amount is losslessly representable in the self type.
// FIXME(const-hack) replace with `.try_into().ok().unwrap_unchecked()`.
unsafe { intrinsics::unchecked_shr(self, rhs as _) }
unsafe { intrinsics::unchecked_shr(self, conv_rhs_for_unchecked_shift!($SelfT, rhs)) }
}
/// Checked exponentiation. Computes `self.pow(exp)`, returning `None` if

24
tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.diff
View file

@ -10,7 +10,8 @@
+ scope 1 (inlined core::num::<impl u16>::unchecked_shl) { // at $DIR/unchecked_shifts.rs:11:7: 11:23
+ debug self => _3; // in scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
+ debug rhs => _4; // in scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
+ let mut _5: u16; // in scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
+ let mut _5: u16; // in scope 1 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ let mut _6: (u32,); // in scope 1 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ scope 2 {
+ }
+ }
@ -21,18 +22,27 @@
StorageLive(_4); // scope 0 at $DIR/unchecked_shifts.rs:+1:21: +1:22
_4 = _2; // scope 0 at $DIR/unchecked_shifts.rs:+1:21: +1:22
- _0 = core::num::<impl u16>::unchecked_shl(move _3, move _4) -> bb1; // scope 0 at $DIR/unchecked_shifts.rs:+1:5: +1:23
+ StorageLive(_5); // scope 0 at $DIR/unchecked_shifts.rs:+1:7: +1:23
+ _5 = _4 as u16 (IntToInt); // scope 2 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
+ _0 = unchecked_shl::<u16>(_3, _5) -> [return: bb1, unwind unreachable]; // scope 2 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
+ StorageLive(_5); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ StorageLive(_6); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ _6 = (_4,); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ _5 = core::num::<impl u16>::unchecked_shl::conv(move (_6.0: u32)) -> bb1; // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
// mir::Constant
- // + span: $DIR/unchecked_shifts.rs:11:7: 11:20
- // + literal: Const { ty: unsafe fn(u16, u32) -> u16 {core::num::<impl u16>::unchecked_shl}, val: Value(<ZST>) }
+ // + span: $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
+ // + literal: Const { ty: unsafe extern "rust-intrinsic" fn(u16, u16) -> u16 {unchecked_shl::<u16>}, val: Value(<ZST>) }
+ // + span: $SRC_DIR/core/src/num/mod.rs:LL:COL
+ // + literal: Const { ty: fn(u32) -> u16 {core::num::<impl u16>::unchecked_shl::conv}, val: Value(<ZST>) }
}
bb1: {
+ StorageDead(_5); // scope 0 at $DIR/unchecked_shifts.rs:+1:7: +1:23
+ StorageDead(_6); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ _0 = unchecked_shl::<u16>(_3, move _5) -> [return: bb2, unwind unreachable]; // scope 2 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
+ // mir::Constant
+ // + span: $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
+ // + literal: Const { ty: unsafe extern "rust-intrinsic" fn(u16, u16) -> u16 {unchecked_shl::<u16>}, val: Value(<ZST>) }
+ }
+
+ bb2: {
+ StorageDead(_5); // scope 2 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
StorageDead(_4); // scope 0 at $DIR/unchecked_shifts.rs:+1:22: +1:23
StorageDead(_3); // scope 0 at $DIR/unchecked_shifts.rs:+1:22: +1:23
return; // scope 0 at $DIR/unchecked_shifts.rs:+2:2: +2:2

22
tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.PreCodegen.after.mir
View file

@ -7,22 +7,32 @@ fn unchecked_shl_unsigned_smaller(_1: u16, _2: u32) -> u16 {
scope 1 (inlined core::num::<impl u16>::unchecked_shl) { // at $DIR/unchecked_shifts.rs:11:7: 11:23
debug self => _1; // in scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
debug rhs => _2; // in scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
let mut _3: u16; // in scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
let mut _3: u16; // in scope 1 at $SRC_DIR/core/src/num/mod.rs:LL:COL
let mut _4: (u32,); // in scope 1 at $SRC_DIR/core/src/num/mod.rs:LL:COL
scope 2 {
}
}
bb0: {
StorageLive(_3); // scope 0 at $DIR/unchecked_shifts.rs:+1:7: +1:23
_3 = _2 as u16 (IntToInt); // scope 2 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
_0 = unchecked_shl::<u16>(_1, _3) -> [return: bb1, unwind unreachable]; // scope 2 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
StorageLive(_3); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
StorageLive(_4); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
_4 = (_2,); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
_3 = core::num::<impl u16>::unchecked_shl::conv(move (_4.0: u32)) -> bb1; // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
// mir::Constant
// + span: $SRC_DIR/core/src/num/mod.rs:LL:COL
// + literal: Const { ty: fn(u32) -> u16 {core::num::<impl u16>::unchecked_shl::conv}, val: Value(<ZST>) }
}
bb1: {
StorageDead(_4); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
_0 = unchecked_shl::<u16>(_1, move _3) -> [return: bb2, unwind unreachable]; // scope 2 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
// mir::Constant
// + span: $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
// + literal: Const { ty: unsafe extern "rust-intrinsic" fn(u16, u16) -> u16 {unchecked_shl::<u16>}, val: Value(<ZST>) }
}
bb1: {
StorageDead(_3); // scope 0 at $DIR/unchecked_shifts.rs:+1:7: +1:23
bb2: {
StorageDead(_3); // scope 2 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
return; // scope 0 at $DIR/unchecked_shifts.rs:+2:2: +2:2
}
}

24
tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.Inline.diff
View file

@ -10,7 +10,8 @@
+ scope 1 (inlined core::num::<impl i16>::unchecked_shr) { // at $DIR/unchecked_shifts.rs:17:7: 17:23
+ debug self => _3; // in scope 1 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
+ debug rhs => _4; // in scope 1 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
+ let mut _5: i16; // in scope 1 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
+ let mut _5: i16; // in scope 1 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ let mut _6: (u32,); // in scope 1 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ scope 2 {
+ }
+ }
@ -21,18 +22,27 @@
StorageLive(_4); // scope 0 at $DIR/unchecked_shifts.rs:+1:21: +1:22
_4 = _2; // scope 0 at $DIR/unchecked_shifts.rs:+1:21: +1:22
- _0 = core::num::<impl i16>::unchecked_shr(move _3, move _4) -> bb1; // scope 0 at $DIR/unchecked_shifts.rs:+1:5: +1:23
+ StorageLive(_5); // scope 0 at $DIR/unchecked_shifts.rs:+1:7: +1:23
+ _5 = _4 as i16 (IntToInt); // scope 2 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
+ _0 = unchecked_shr::<i16>(_3, _5) -> [return: bb1, unwind unreachable]; // scope 2 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
+ StorageLive(_5); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ StorageLive(_6); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ _6 = (_4,); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ _5 = core::num::<impl i16>::unchecked_shr::conv(move (_6.0: u32)) -> bb1; // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
// mir::Constant
- // + span: $DIR/unchecked_shifts.rs:17:7: 17:20
- // + literal: Const { ty: unsafe fn(i16, u32) -> i16 {core::num::<impl i16>::unchecked_shr}, val: Value(<ZST>) }
+ // + span: $SRC_DIR/core/src/num/int_macros.rs:LL:COL
+ // + literal: Const { ty: unsafe extern "rust-intrinsic" fn(i16, i16) -> i16 {unchecked_shr::<i16>}, val: Value(<ZST>) }
+ // + span: $SRC_DIR/core/src/num/mod.rs:LL:COL
+ // + literal: Const { ty: fn(u32) -> i16 {core::num::<impl i16>::unchecked_shr::conv}, val: Value(<ZST>) }
}
bb1: {
+ StorageDead(_5); // scope 0 at $DIR/unchecked_shifts.rs:+1:7: +1:23
+ StorageDead(_6); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
+ _0 = unchecked_shr::<i16>(_3, move _5) -> [return: bb2, unwind unreachable]; // scope 2 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
+ // mir::Constant
+ // + span: $SRC_DIR/core/src/num/int_macros.rs:LL:COL
+ // + literal: Const { ty: unsafe extern "rust-intrinsic" fn(i16, i16) -> i16 {unchecked_shr::<i16>}, val: Value(<ZST>) }
+ }
+
+ bb2: {
+ StorageDead(_5); // scope 2 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
StorageDead(_4); // scope 0 at $DIR/unchecked_shifts.rs:+1:22: +1:23
StorageDead(_3); // scope 0 at $DIR/unchecked_shifts.rs:+1:22: +1:23
return; // scope 0 at $DIR/unchecked_shifts.rs:+2:2: +2:2

22
tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.mir
View file

@ -7,22 +7,32 @@ fn unchecked_shr_signed_smaller(_1: i16, _2: u32) -> i16 {
scope 1 (inlined core::num::<impl i16>::unchecked_shr) { // at $DIR/unchecked_shifts.rs:17:7: 17:23
debug self => _1; // in scope 1 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
debug rhs => _2; // in scope 1 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
let mut _3: i16; // in scope 1 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
let mut _3: i16; // in scope 1 at $SRC_DIR/core/src/num/mod.rs:LL:COL
let mut _4: (u32,); // in scope 1 at $SRC_DIR/core/src/num/mod.rs:LL:COL
scope 2 {
}
}
bb0: {
StorageLive(_3); // scope 0 at $DIR/unchecked_shifts.rs:+1:7: +1:23
_3 = _2 as i16 (IntToInt); // scope 2 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
_0 = unchecked_shr::<i16>(_1, _3) -> [return: bb1, unwind unreachable]; // scope 2 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
StorageLive(_3); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
StorageLive(_4); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
_4 = (_2,); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
_3 = core::num::<impl i16>::unchecked_shr::conv(move (_4.0: u32)) -> bb1; // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
// mir::Constant
// + span: $SRC_DIR/core/src/num/mod.rs:LL:COL
// + literal: Const { ty: fn(u32) -> i16 {core::num::<impl i16>::unchecked_shr::conv}, val: Value(<ZST>) }
}
bb1: {
StorageDead(_4); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
_0 = unchecked_shr::<i16>(_1, move _3) -> [return: bb2, unwind unreachable]; // scope 2 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
// mir::Constant
// + span: $SRC_DIR/core/src/num/int_macros.rs:LL:COL
// + literal: Const { ty: unsafe extern "rust-intrinsic" fn(i16, i16) -> i16 {unchecked_shr::<i16>}, val: Value(<ZST>) }
}
bb1: {
StorageDead(_3); // scope 0 at $DIR/unchecked_shifts.rs:+1:7: +1:23
bb2: {
StorageDead(_3); // scope 2 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
return; // scope 0 at $DIR/unchecked_shifts.rs:+2:2: +2:2
}
}