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Merge pull request #1871 from folkertdev/aarch64-float-min-max

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`aarch64`: use more of `intrinsics::simd` for min/max
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Amanieu d'Antras 2025-07-14 23:24:32 +00:00 • committed by GitHub
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4 changed files with 66 additions and 491 deletions
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library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs
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@ -13229,14 +13229,7 @@ pub fn vmaxh_f16(a: f16, b: f16) -> f16 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(fmaxnm))]
pub fn vmaxnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fmaxnm.v1f64"
)]
fn _vmaxnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t;
}
unsafe { _vmaxnm_f64(a, b) }
unsafe { simd_fmax(a, b) }
}
#[doc = "Floating-point Maximum Number (vector)"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmq_f64)"]
@ -13245,14 +13238,7 @@ pub fn vmaxnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(fmaxnm))]
pub fn vmaxnmq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fmaxnm.v2f64"
)]
fn _vmaxnmq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t;
}
unsafe { _vmaxnmq_f64(a, b) }
unsafe { simd_fmax(a, b) }
}
#[doc = "Floating-point Maximum Number"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmh_f16)"]
@ -13261,14 +13247,7 @@ pub fn vmaxnmq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t {
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg_attr(test, assert_instr(fmaxnm))]
pub fn vmaxnmh_f16(a: f16, b: f16) -> f16 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fmaxnm.f16"
)]
fn _vmaxnmh_f16(a: f16, b: f16) -> f16;
}
unsafe { _vmaxnmh_f16(a, b) }
f16::max(a, b)
}
#[doc = "Floating-point maximum number across vector"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmv_f16)"]
@ -13277,14 +13256,7 @@ pub fn vmaxnmh_f16(a: f16, b: f16) -> f16 {
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg_attr(test, assert_instr(fmaxnmv))]
pub fn vmaxnmv_f16(a: float16x4_t) -> f16 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fmaxnmv.f16.v4f16"
)]
fn _vmaxnmv_f16(a: float16x4_t) -> f16;
}
unsafe { _vmaxnmv_f16(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Floating-point maximum number across vector"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmvq_f16)"]
@ -13293,14 +13265,7 @@ pub fn vmaxnmv_f16(a: float16x4_t) -> f16 {
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg_attr(test, assert_instr(fmaxnmv))]
pub fn vmaxnmvq_f16(a: float16x8_t) -> f16 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fmaxnmv.f16.v8f16"
)]
fn _vmaxnmvq_f16(a: float16x8_t) -> f16;
}
unsafe { _vmaxnmvq_f16(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Floating-point maximum number across vector"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmv_f32)"]
@ -13309,14 +13274,7 @@ pub fn vmaxnmvq_f16(a: float16x8_t) -> f16 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(fmaxnmp))]
pub fn vmaxnmv_f32(a: float32x2_t) -> f32 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fmaxnmv.f32.v2f32"
)]
fn _vmaxnmv_f32(a: float32x2_t) -> f32;
}
unsafe { _vmaxnmv_f32(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Floating-point maximum number across vector"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmvq_f64)"]
@ -13325,14 +13283,7 @@ pub fn vmaxnmv_f32(a: float32x2_t) -> f32 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(fmaxnmp))]
pub fn vmaxnmvq_f64(a: float64x2_t) -> f64 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fmaxnmv.f64.v2f64"
)]
fn _vmaxnmvq_f64(a: float64x2_t) -> f64;
}
unsafe { _vmaxnmvq_f64(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Floating-point maximum number across vector"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmvq_f32)"]
@ -13341,14 +13292,7 @@ pub fn vmaxnmvq_f64(a: float64x2_t) -> f64 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(fmaxnmv))]
pub fn vmaxnmvq_f32(a: float32x4_t) -> f32 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fmaxnmv.f32.v4f32"
)]
fn _vmaxnmvq_f32(a: float32x4_t) -> f32;
}
unsafe { _vmaxnmvq_f32(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Floating-point maximum number across vector"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_f16)"]
@ -13437,14 +13381,7 @@ pub fn vmaxvq_f64(a: float64x2_t) -> f64 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(smaxv))]
pub fn vmaxv_s8(a: int8x8_t) -> i8 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.smaxv.i8.v8i8"
)]
fn _vmaxv_s8(a: int8x8_t) -> i8;
}
unsafe { _vmaxv_s8(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Horizontal vector max."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_s8)"]
@ -13453,14 +13390,7 @@ pub fn vmaxv_s8(a: int8x8_t) -> i8 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(smaxv))]
pub fn vmaxvq_s8(a: int8x16_t) -> i8 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.smaxv.i8.v16i8"
)]
fn _vmaxvq_s8(a: int8x16_t) -> i8;
}
unsafe { _vmaxvq_s8(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Horizontal vector max."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_s16)"]
@ -13469,14 +13399,7 @@ pub fn vmaxvq_s8(a: int8x16_t) -> i8 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(smaxv))]
pub fn vmaxv_s16(a: int16x4_t) -> i16 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.smaxv.i16.v4i16"
)]
fn _vmaxv_s16(a: int16x4_t) -> i16;
}
unsafe { _vmaxv_s16(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Horizontal vector max."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_s16)"]
@ -13485,14 +13408,7 @@ pub fn vmaxv_s16(a: int16x4_t) -> i16 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(smaxv))]
pub fn vmaxvq_s16(a: int16x8_t) -> i16 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.smaxv.i16.v8i16"
)]
fn _vmaxvq_s16(a: int16x8_t) -> i16;
}
unsafe { _vmaxvq_s16(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Horizontal vector max."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_s32)"]
@ -13501,14 +13417,7 @@ pub fn vmaxvq_s16(a: int16x8_t) -> i16 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(smaxp))]
pub fn vmaxv_s32(a: int32x2_t) -> i32 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.smaxv.i32.v2i32"
)]
fn _vmaxv_s32(a: int32x2_t) -> i32;
}
unsafe { _vmaxv_s32(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Horizontal vector max."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_s32)"]
@ -13517,14 +13426,7 @@ pub fn vmaxv_s32(a: int32x2_t) -> i32 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(smaxv))]
pub fn vmaxvq_s32(a: int32x4_t) -> i32 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.smaxv.i32.v4i32"
)]
fn _vmaxvq_s32(a: int32x4_t) -> i32;
}
unsafe { _vmaxvq_s32(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Horizontal vector max."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_u8)"]
@ -13533,14 +13435,7 @@ pub fn vmaxvq_s32(a: int32x4_t) -> i32 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(umaxv))]
pub fn vmaxv_u8(a: uint8x8_t) -> u8 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.umaxv.i8.v8i8"
)]
fn _vmaxv_u8(a: uint8x8_t) -> u8;
}
unsafe { _vmaxv_u8(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Horizontal vector max."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_u8)"]
@ -13549,14 +13444,7 @@ pub fn vmaxv_u8(a: uint8x8_t) -> u8 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(umaxv))]
pub fn vmaxvq_u8(a: uint8x16_t) -> u8 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.umaxv.i8.v16i8"
)]
fn _vmaxvq_u8(a: uint8x16_t) -> u8;
}
unsafe { _vmaxvq_u8(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Horizontal vector max."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_u16)"]
@ -13565,14 +13453,7 @@ pub fn vmaxvq_u8(a: uint8x16_t) -> u8 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(umaxv))]
pub fn vmaxv_u16(a: uint16x4_t) -> u16 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.umaxv.i16.v4i16"
)]
fn _vmaxv_u16(a: uint16x4_t) -> u16;
}
unsafe { _vmaxv_u16(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Horizontal vector max."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_u16)"]
@ -13581,14 +13462,7 @@ pub fn vmaxv_u16(a: uint16x4_t) -> u16 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(umaxv))]
pub fn vmaxvq_u16(a: uint16x8_t) -> u16 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.umaxv.i16.v8i16"
)]
fn _vmaxvq_u16(a: uint16x8_t) -> u16;
}
unsafe { _vmaxvq_u16(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Horizontal vector max."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_u32)"]
@ -13597,14 +13471,7 @@ pub fn vmaxvq_u16(a: uint16x8_t) -> u16 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(umaxp))]
pub fn vmaxv_u32(a: uint32x2_t) -> u32 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.umaxv.i32.v2i32"
)]
fn _vmaxv_u32(a: uint32x2_t) -> u32;
}
unsafe { _vmaxv_u32(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Horizontal vector max."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_u32)"]
@ -13613,14 +13480,7 @@ pub fn vmaxv_u32(a: uint32x2_t) -> u32 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(umaxv))]
pub fn vmaxvq_u32(a: uint32x4_t) -> u32 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.umaxv.i32.v4i32"
)]
fn _vmaxvq_u32(a: uint32x4_t) -> u32;
}
unsafe { _vmaxvq_u32(a) }
unsafe { simd_reduce_max(a) }
}
#[doc = "Minimum (vector)"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmin_f64)"]
@ -13677,14 +13537,7 @@ pub fn vminh_f16(a: f16, b: f16) -> f16 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(fminnm))]
pub fn vminnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fminnm.v1f64"
)]
fn _vminnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t;
}
unsafe { _vminnm_f64(a, b) }
unsafe { simd_fmin(a, b) }
}
#[doc = "Floating-point Minimum Number (vector)"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmq_f64)"]
@ -13693,14 +13546,7 @@ pub fn vminnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(fminnm))]
pub fn vminnmq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fminnm.v2f64"
)]
fn _vminnmq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t;
}
unsafe { _vminnmq_f64(a, b) }
unsafe { simd_fmin(a, b) }
}
#[doc = "Floating-point Minimum Number"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmh_f16)"]
@ -13709,14 +13555,7 @@ pub fn vminnmq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t {
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg_attr(test, assert_instr(fminnm))]
pub fn vminnmh_f16(a: f16, b: f16) -> f16 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fminnm.f16"
)]
fn _vminnmh_f16(a: f16, b: f16) -> f16;
}
unsafe { _vminnmh_f16(a, b) }
f16::min(a, b)
}
#[doc = "Floating-point minimum number across vector"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmv_f16)"]
@ -13725,14 +13564,7 @@ pub fn vminnmh_f16(a: f16, b: f16) -> f16 {
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg_attr(test, assert_instr(fminnmv))]
pub fn vminnmv_f16(a: float16x4_t) -> f16 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fminnmv.f16.v4f16"
)]
fn _vminnmv_f16(a: float16x4_t) -> f16;
}
unsafe { _vminnmv_f16(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Floating-point minimum number across vector"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmvq_f16)"]
@ -13741,14 +13573,7 @@ pub fn vminnmv_f16(a: float16x4_t) -> f16 {
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg_attr(test, assert_instr(fminnmv))]
pub fn vminnmvq_f16(a: float16x8_t) -> f16 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fminnmv.f16.v8f16"
)]
fn _vminnmvq_f16(a: float16x8_t) -> f16;
}
unsafe { _vminnmvq_f16(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Floating-point minimum number across vector"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmv_f32)"]
@ -13757,14 +13582,7 @@ pub fn vminnmvq_f16(a: float16x8_t) -> f16 {
#[cfg_attr(test, assert_instr(fminnmp))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub fn vminnmv_f32(a: float32x2_t) -> f32 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fminnmv.f32.v2f32"
)]
fn _vminnmv_f32(a: float32x2_t) -> f32;
}
unsafe { _vminnmv_f32(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Floating-point minimum number across vector"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmvq_f64)"]
@ -13773,14 +13591,7 @@ pub fn vminnmv_f32(a: float32x2_t) -> f32 {
#[cfg_attr(test, assert_instr(fminnmp))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub fn vminnmvq_f64(a: float64x2_t) -> f64 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fminnmv.f64.v2f64"
)]
fn _vminnmvq_f64(a: float64x2_t) -> f64;
}
unsafe { _vminnmvq_f64(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Floating-point minimum number across vector"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmvq_f32)"]
@ -13789,14 +13600,7 @@ pub fn vminnmvq_f64(a: float64x2_t) -> f64 {
#[cfg_attr(test, assert_instr(fminnmv))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub fn vminnmvq_f32(a: float32x4_t) -> f32 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fminnmv.f32.v4f32"
)]
fn _vminnmvq_f32(a: float32x4_t) -> f32;
}
unsafe { _vminnmvq_f32(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Floating-point minimum number across vector"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_f16)"]
@ -13885,14 +13689,7 @@ pub fn vminvq_f64(a: float64x2_t) -> f64 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(sminv))]
pub fn vminv_s8(a: int8x8_t) -> i8 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.sminv.i8.v8i8"
)]
fn _vminv_s8(a: int8x8_t) -> i8;
}
unsafe { _vminv_s8(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Horizontal vector min."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_s8)"]
@ -13901,14 +13698,7 @@ pub fn vminv_s8(a: int8x8_t) -> i8 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(sminv))]
pub fn vminvq_s8(a: int8x16_t) -> i8 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.sminv.i8.v16i8"
)]
fn _vminvq_s8(a: int8x16_t) -> i8;
}
unsafe { _vminvq_s8(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Horizontal vector min."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_s16)"]
@ -13917,14 +13707,7 @@ pub fn vminvq_s8(a: int8x16_t) -> i8 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(sminv))]
pub fn vminv_s16(a: int16x4_t) -> i16 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.sminv.i16.v4i16"
)]
fn _vminv_s16(a: int16x4_t) -> i16;
}
unsafe { _vminv_s16(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Horizontal vector min."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_s16)"]
@ -13933,14 +13716,7 @@ pub fn vminv_s16(a: int16x4_t) -> i16 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(sminv))]
pub fn vminvq_s16(a: int16x8_t) -> i16 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.sminv.i16.v8i16"
)]
fn _vminvq_s16(a: int16x8_t) -> i16;
}
unsafe { _vminvq_s16(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Horizontal vector min."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_s32)"]
@ -13949,14 +13725,7 @@ pub fn vminvq_s16(a: int16x8_t) -> i16 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(sminp))]
pub fn vminv_s32(a: int32x2_t) -> i32 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.sminv.i32.v2i32"
)]
fn _vminv_s32(a: int32x2_t) -> i32;
}
unsafe { _vminv_s32(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Horizontal vector min."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_s32)"]
@ -13965,14 +13734,7 @@ pub fn vminv_s32(a: int32x2_t) -> i32 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(sminv))]
pub fn vminvq_s32(a: int32x4_t) -> i32 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.sminv.i32.v4i32"
)]
fn _vminvq_s32(a: int32x4_t) -> i32;
}
unsafe { _vminvq_s32(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Horizontal vector min."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_u8)"]
@ -13981,14 +13743,7 @@ pub fn vminvq_s32(a: int32x4_t) -> i32 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(uminv))]
pub fn vminv_u8(a: uint8x8_t) -> u8 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.uminv.i8.v8i8"
)]
fn _vminv_u8(a: uint8x8_t) -> u8;
}
unsafe { _vminv_u8(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Horizontal vector min."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_u8)"]
@ -13997,14 +13752,7 @@ pub fn vminv_u8(a: uint8x8_t) -> u8 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(uminv))]
pub fn vminvq_u8(a: uint8x16_t) -> u8 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.uminv.i8.v16i8"
)]
fn _vminvq_u8(a: uint8x16_t) -> u8;
}
unsafe { _vminvq_u8(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Horizontal vector min."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_u16)"]
@ -14013,14 +13761,7 @@ pub fn vminvq_u8(a: uint8x16_t) -> u8 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(uminv))]
pub fn vminv_u16(a: uint16x4_t) -> u16 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.uminv.i16.v4i16"
)]
fn _vminv_u16(a: uint16x4_t) -> u16;
}
unsafe { _vminv_u16(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Horizontal vector min."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_u16)"]
@ -14029,14 +13770,7 @@ pub fn vminv_u16(a: uint16x4_t) -> u16 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(uminv))]
pub fn vminvq_u16(a: uint16x8_t) -> u16 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.uminv.i16.v8i16"
)]
fn _vminvq_u16(a: uint16x8_t) -> u16;
}
unsafe { _vminvq_u16(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Horizontal vector min."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_u32)"]
@ -14045,14 +13779,7 @@ pub fn vminvq_u16(a: uint16x8_t) -> u16 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(uminp))]
pub fn vminv_u32(a: uint32x2_t) -> u32 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.uminv.i32.v2i32"
)]
fn _vminv_u32(a: uint32x2_t) -> u32;
}
unsafe { _vminv_u32(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Horizontal vector min."]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_u32)"]
@ -14061,14 +13788,7 @@ pub fn vminv_u32(a: uint32x2_t) -> u32 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(uminv))]
pub fn vminvq_u32(a: uint32x4_t) -> u32 {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.uminv.i32.v4i32"
)]
fn _vminvq_u32(a: uint32x4_t) -> u32;
}
unsafe { _vminvq_u32(a) }
unsafe { simd_reduce_min(a) }
}
#[doc = "Floating-point multiply-add to accumulator"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmla_f64)"]

80
library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs
View file

@ -27942,15 +27942,7 @@ pub fn vmaxq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
#[target_feature(enable = "neon,fp16")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
pub fn vmaxnm_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t {
unsafe extern "unadjusted" {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxnm.v4f16")]
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fmaxnm.v4f16"
)]
fn _vmaxnm_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t;
}
unsafe { _vmaxnm_f16(a, b) }
unsafe { simd_fmax(a, b) }
}
#[doc = "Floating-point Maximum Number (vector)"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmq_f16)"]
@ -27964,15 +27956,7 @@ pub fn vmaxnm_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t {
#[target_feature(enable = "neon,fp16")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
pub fn vmaxnmq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t {
unsafe extern "unadjusted" {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxnm.v8f16")]
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fmaxnm.v8f16"
)]
fn _vmaxnmq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t;
}
unsafe { _vmaxnmq_f16(a, b) }
unsafe { simd_fmax(a, b) }
}
#[doc = "Floating-point Maximum Number (vector)"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnm_f32)"]
@ -27993,15 +27977,7 @@ pub fn vmaxnmq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t {
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
)]
pub fn vmaxnm_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxnm.v2f32")]
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fmaxnm.v2f32"
)]
fn _vmaxnm_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t;
}
unsafe { _vmaxnm_f32(a, b) }
unsafe { simd_fmax(a, b) }
}
#[doc = "Floating-point Maximum Number (vector)"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmq_f32)"]
@ -28022,15 +27998,7 @@ pub fn vmaxnm_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t {
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
)]
pub fn vmaxnmq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t {
unsafe extern "unadjusted" {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxnm.v4f32")]
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fmaxnm.v4f32"
)]
fn _vmaxnmq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t;
}
unsafe { _vmaxnmq_f32(a, b) }
unsafe { simd_fmax(a, b) }
}
#[doc = "Minimum (vector)"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmin_f16)"]
@ -28434,15 +28402,7 @@ pub fn vminq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
#[target_feature(enable = "neon,fp16")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
pub fn vminnm_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t {
unsafe extern "unadjusted" {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminnm.v4f16")]
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fminnm.v4f16"
)]
fn _vminnm_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t;
}
unsafe { _vminnm_f16(a, b) }
unsafe { simd_fmin(a, b) }
}
#[doc = "Floating-point Minimum Number (vector)"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmq_f16)"]
@ -28456,15 +28416,7 @@ pub fn vminnm_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t {
#[target_feature(enable = "neon,fp16")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
pub fn vminnmq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t {
unsafe extern "unadjusted" {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminnm.v8f16")]
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fminnm.v8f16"
)]
fn _vminnmq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t;
}
unsafe { _vminnmq_f16(a, b) }
unsafe { simd_fmin(a, b) }
}
#[doc = "Floating-point Minimum Number (vector)"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnm_f32)"]
@ -28485,15 +28437,7 @@ pub fn vminnmq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t {
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
)]
pub fn vminnm_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminnm.v2f32")]
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fminnm.v2f32"
)]
fn _vminnm_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t;
}
unsafe { _vminnm_f32(a, b) }
unsafe { simd_fmin(a, b) }
}
#[doc = "Floating-point Minimum Number (vector)"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmq_f32)"]
@ -28514,15 +28458,7 @@ pub fn vminnm_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t {
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
)]
pub fn vminnmq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t {
unsafe extern "unadjusted" {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminnm.v4f32")]
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.fminnm.v4f32"
)]
fn _vminnmq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t;
}
unsafe { _vminnmq_f32(a, b) }
unsafe { simd_fmin(a, b) }
}
#[doc = "Floating-point multiply-add to accumulator"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmla_f32)"]

85
library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml
View file

@ -6580,7 +6580,6 @@ intrinsics:
arch: aarch64,arm64ec
- name: "vmaxnm{neon_type.no}"
doc: Floating-point Maximum Number (vector)
arguments: ["a: {neon_type}", "b: {neon_type}"]
@ -6592,11 +6591,7 @@ intrinsics:
- float64x1_t
- float64x2_t
compose:
- LLVMLink:
name: "fmaxnm.{neon_type}"
links:
- link: "llvm.aarch64.neon.fmaxnm.{neon_type}"
arch: aarch64,arm64ec
- FnCall: [simd_fmax, [a, b]]
- name: "vmaxnmh_{type}"
@ -6611,11 +6606,7 @@ intrinsics:
types:
- f16
compose:
- LLVMLink:
name: "vmaxh.{neon_type}"
links:
- link: "llvm.aarch64.neon.fmaxnm.{type}"
arch: aarch64,arm64ec
- FnCall: ["f16::max", [a, b]]
- name: "vminnmh_{type}"
@ -6630,11 +6621,7 @@ intrinsics:
types:
- f16
compose:
- LLVMLink:
name: "vminh.{neon_type}"
links:
- link: "llvm.aarch64.neon.fminnm.{type}"
arch: aarch64,arm64ec
- FnCall: ["f16::min", [a, b]]
- name: "vmaxnmv{neon_type[0].no}"
@ -6648,11 +6635,7 @@ intrinsics:
- [float32x2_t, f32]
- [float64x2_t, f64]
compose:
- LLVMLink:
name: "fmaxnmv.{neon_type[0]}"
links:
- link: "llvm.aarch64.neon.fmaxnmv.{type[1]}.{neon_type[0]}"
arch: aarch64,arm64ec
- FnCall: [simd_reduce_max, [a]]
- name: "vmaxnmv{neon_type[0].no}"
doc: Floating-point maximum number across vector
@ -6664,11 +6647,7 @@ intrinsics:
types:
- [float32x4_t, f32]
compose:
- LLVMLink:
name: "fmaxnmv.{neon_type[0]}"
links:
- link: "llvm.aarch64.neon.fmaxnmv.{type[1]}.{neon_type[0]}"
arch: aarch64,arm64ec
- FnCall: [simd_reduce_max, [a]]
- name: "vmaxnmv{neon_type[0].no}"
@ -6684,11 +6663,7 @@ intrinsics:
- [float16x4_t, f16]
- [float16x8_t, f16]
compose:
- LLVMLink:
name: "fmaxnmv.{neon_type[0]}"
links:
- link: "llvm.aarch64.neon.fmaxnmv.{type[1]}.{neon_type[0]}"
arch: aarch64,arm64ec
- FnCall: [simd_reduce_max, [a]]
- name: "vminnmv{neon_type[0].no}"
@ -6704,11 +6679,7 @@ intrinsics:
- [float16x4_t, f16]
- [float16x8_t, f16]
compose:
- LLVMLink:
name: "fminnmv.{neon_type[0]}"
links:
- link: "llvm.aarch64.neon.fminnmv.{type[1]}.{neon_type[0]}"
arch: aarch64,arm64ec
- FnCall: [simd_reduce_min, [a]]
- name: "vmaxv{neon_type[0].no}"
@ -6814,11 +6785,7 @@ intrinsics:
- float64x1_t
- float64x2_t
compose:
- LLVMLink:
name: "fminnm.{neon_type}"
links:
- link: "llvm.aarch64.neon.fminnm.{neon_type}"
arch: aarch64,arm64ec
- FnCall: [simd_fmin, [a, b]]
- name: "vminnmv{neon_type[0].no}"
doc: "Floating-point minimum number across vector"
@ -6832,11 +6799,7 @@ intrinsics:
- [float32x2_t, "f32"]
- [float64x2_t, "f64"]
compose:
- LLVMLink:
name: "vminnmv.{neon_type[0]}"
links:
- link: "llvm.aarch64.neon.fminnmv.{type[1]}.{neon_type[0]}"
arch: aarch64,arm64ec
- FnCall: [simd_reduce_min, [a]]
- name: "vminnmv{neon_type[0].no}"
doc: "Floating-point minimum number across vector"
@ -6849,11 +6812,7 @@ intrinsics:
types:
- [float32x4_t, "f32"]
compose:
- LLVMLink:
name: "vminnmv.{neon_type[0]}"
links:
- link: "llvm.aarch64.neon.fminnmv.{type[1]}.{neon_type[0]}"
arch: aarch64,arm64ec
- FnCall: [simd_reduce_min, [a]]
- name: "vmovl_high{neon_type[0].noq}"
doc: Vector move
@ -13327,11 +13286,7 @@ intrinsics:
- [int16x8_t, i16, 'smaxv']
- [int32x4_t, i32, 'smaxv']
compose:
- LLVMLink:
name: "vmaxv{neon_type[0].no}"
links:
- link: "llvm.aarch64.neon.smaxv.{type[1]}.{neon_type[0]}"
arch: aarch64,arm64ec
- FnCall: [simd_reduce_max, [a]]
- name: "vmaxv{neon_type[0].no}"
doc: "Horizontal vector max."
@ -13349,11 +13304,7 @@ intrinsics:
- [uint16x8_t, u16, 'umaxv']
- [uint32x4_t, u32, 'umaxv']
compose:
- LLVMLink:
name: "vmaxv{neon_type[0].no}"
links:
- link: "llvm.aarch64.neon.umaxv.{type[1]}.{neon_type[0]}"
arch: aarch64,arm64ec
- FnCall: [simd_reduce_max, [a]]
- name: "vmaxv{neon_type[0].no}"
doc: "Horizontal vector max."
@ -13390,11 +13341,7 @@ intrinsics:
- [int16x8_t, i16, 'sminv']
- [int32x4_t, i32, 'sminv']
compose:
- LLVMLink:
name: "vminv{neon_type[0].no}"
links:
- link: "llvm.aarch64.neon.sminv.{type[1]}.{neon_type[0]}"
arch: aarch64,arm64ec
- FnCall: [simd_reduce_min, [a]]
- name: "vminv{neon_type[0].no}"
doc: "Horizontal vector min."
@ -13412,11 +13359,7 @@ intrinsics:
- [uint16x8_t, u16, 'uminv']
- [uint32x4_t, u32, 'uminv']
compose:
- LLVMLink:
name: "vminv{neon_type[0].no}"
links:
- link: "llvm.aarch64.neon.uminv.{type[1]}.{neon_type[0]}"
arch: aarch64,arm64ec
- FnCall: [simd_reduce_min, [a]]
- name: "vminv{neon_type[0].no}"
doc: "Horizontal vector min."

32
library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml
View file

@ -7223,13 +7223,7 @@ intrinsics:
- float32x2_t
- float32x4_t
compose:
- LLVMLink:
name: "fmaxnm.{neon_type}"
links:
- link: "llvm.arm.neon.vmaxnm.{neon_type}"
arch: arm
- link: "llvm.aarch64.neon.fmaxnm.{neon_type}"
arch: aarch64,arm64ec
- FnCall: [simd_fmax, [a, b]]
- name: "vmaxnm{neon_type.no}"
@ -7247,13 +7241,7 @@ intrinsics:
- float16x4_t
- float16x8_t
compose:
- LLVMLink:
name: "fmaxnm.{neon_type}"
links:
- link: "llvm.arm.neon.vmaxnm.{neon_type}"
arch: arm
- link: "llvm.aarch64.neon.fmaxnm.{neon_type}"
arch: aarch64,arm64ec
- FnCall: [simd_fmax, [a, b]]
- name: "vminnm{neon_type.no}"
@ -7271,13 +7259,7 @@ intrinsics:
- float16x4_t
- float16x8_t
compose:
- LLVMLink:
name: "fminnm.{neon_type}"
links:
- link: "llvm.arm.neon.vminnm.{neon_type}"
arch: arm
- link: "llvm.aarch64.neon.fminnm.{neon_type}"
arch: aarch64,arm64ec
- FnCall: [simd_fmin, [a, b]]
- name: "vmin{neon_type.no}"
@ -7388,13 +7370,7 @@ intrinsics:
- float32x2_t
- float32x4_t
compose:
- LLVMLink:
name: "fminnm.{neon_type}"
links:
- link: "llvm.arm.neon.vminnm.{neon_type}"
arch: arm
- link: "llvm.aarch64.neon.fminnm.{neon_type}"
arch: aarch64,arm64ec
- FnCall: [simd_fmin, [a, b]]
- name: "vpadd{neon_type.no}"
doc: Floating-point add pairwise