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RISC-V: Add RISC-V + Linux / Android test

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This is ported from Taiki Endo's branch and sorted by the `@FEATURE` order
as in `src/detect/arch/riscv.rs`.

Co-Authored-By: Taiki Endo <te316e89@gmail.com>
This commit is contained in:
Tsukasa OI 2025-04-11 01:13:44 +00:00 • committed by Amanieu d'Antras
parent ed2d3ee924
commit de643c040d
1 changed files with 65 additions and 0 deletions
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65
library/stdarch/crates/std_detect/tests/cpu-detection.rs
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@ -5,6 +5,10 @@
any(target_arch = "aarch64", target_arch = "arm64ec"),
feature(stdarch_aarch64_feature_detection)
)]
#![cfg_attr(
any(target_arch = "riscv32", target_arch = "riscv64"),
feature(stdarch_riscv_feature_detection)
)]
#![cfg_attr(target_arch = "powerpc", feature(stdarch_powerpc_feature_detection))]
#![cfg_attr(target_arch = "powerpc64", feature(stdarch_powerpc_feature_detection))]
#![cfg_attr(target_arch = "s390x", feature(stdarch_s390x_feature_detection))]
@ -15,6 +19,8 @@
target_arch = "arm",
target_arch = "aarch64",
target_arch = "arm64ec",
target_arch = "riscv32",
target_arch = "riscv64",
target_arch = "powerpc",
target_arch = "powerpc64",
target_arch = "s390x",
@ -220,6 +226,65 @@ fn aarch64_darwin() {
println!("sha3: {:?}", is_aarch64_feature_detected!("sha3"));
}
#[test]
#[cfg(all(
any(target_arch = "riscv32", target_arch = "riscv64"),
any(target_os = "linux", target_os = "android")
))]
fn riscv_linux() {
println!("rv32i: {}", is_riscv_feature_detected!("rv32i"));
println!("rv32e: {}", is_riscv_feature_detected!("rv32e"));
println!("rv64i: {}", is_riscv_feature_detected!("rv64i"));
println!("rv128i: {}", is_riscv_feature_detected!("rv128i"));
println!("zicsr: {}", is_riscv_feature_detected!("zicsr"));
println!("zicntr: {}", is_riscv_feature_detected!("zicntr"));
println!("zihpm: {}", is_riscv_feature_detected!("zihpm"));
println!("zifencei: {}", is_riscv_feature_detected!("zifencei"));
println!("zihintpause: {}", is_riscv_feature_detected!("zihintpause"));
println!("m: {}", is_riscv_feature_detected!("m"));
println!("a: {}", is_riscv_feature_detected!("a"));
println!("zalrsc: {}", is_riscv_feature_detected!("zalrsc"));
println!("zaamo: {}", is_riscv_feature_detected!("zaamo"));
println!("zam: {}", is_riscv_feature_detected!("zam"));
println!("ztso: {}", is_riscv_feature_detected!("ztso"));
println!("f: {}", is_riscv_feature_detected!("f"));
println!("d: {}", is_riscv_feature_detected!("d"));
println!("q: {}", is_riscv_feature_detected!("q"));
println!("zfh: {}", is_riscv_feature_detected!("zfh"));
println!("zfhmin: {}", is_riscv_feature_detected!("zfhmin"));
println!("zfinx: {}", is_riscv_feature_detected!("zfinx"));
println!("zdinx: {}", is_riscv_feature_detected!("zdinx"));
println!("zhinx: {}", is_riscv_feature_detected!("zhinx"));
println!("zhinxmin: {}", is_riscv_feature_detected!("zhinxmin"));
println!("c: {}", is_riscv_feature_detected!("c"));
println!("b: {}", is_riscv_feature_detected!("b"));
println!("zba: {}", is_riscv_feature_detected!("zba"));
println!("zbb: {}", is_riscv_feature_detected!("zbb"));
println!("zbc: {}", is_riscv_feature_detected!("zbc"));
println!("zbs: {}", is_riscv_feature_detected!("zbs"));
println!("zbkb: {}", is_riscv_feature_detected!("zbkb"));
println!("zbkc: {}", is_riscv_feature_detected!("zbkc"));
println!("zbkx: {}", is_riscv_feature_detected!("zbkx"));
println!("zknd: {}", is_riscv_feature_detected!("zknd"));
println!("zkne: {}", is_riscv_feature_detected!("zkne"));
println!("zknh: {}", is_riscv_feature_detected!("zknh"));
println!("zksed: {}", is_riscv_feature_detected!("zksed"));
println!("zksh: {}", is_riscv_feature_detected!("zksh"));
println!("zkr: {}", is_riscv_feature_detected!("zkr"));
println!("zkn: {}", is_riscv_feature_detected!("zkn"));
println!("zks: {}", is_riscv_feature_detected!("zks"));
println!("zk: {}", is_riscv_feature_detected!("zk"));
println!("zkt: {}", is_riscv_feature_detected!("zkt"));
println!("v: {}", is_riscv_feature_detected!("v"));
println!("svnapot: {}", is_riscv_feature_detected!("svnapot"));
println!("svpbmt: {}", is_riscv_feature_detected!("svpbmt"));
println!("svinval: {}", is_riscv_feature_detected!("svinval"));
println!("h: {}", is_riscv_feature_detected!("h"));
println!("s: {}", is_riscv_feature_detected!("s"));
println!("j: {}", is_riscv_feature_detected!("j"));
println!("p: {}", is_riscv_feature_detected!("p"));
}
#[test]
#[cfg(all(target_arch = "powerpc", target_os = "linux"))]
fn powerpc_linux() {