std_detect: Add aarch64/linux/LLVM features
Add detection for various aarch64 CPU features already supported by LLVM and Linux. This commit adds feature detection for the following features: - FEAT_CSSC - FEAT_ECV - FEAT_FAMINMAX - FEAT_FLAGM2 - FEAT_FP8 - FEAT_FP8DOT2 - FEAT_FP8DOT4 - FEAT_FP8FMA - FEAT_HBC - FEAT_LSE128 - FEAT_LUT - FEAT_MOPS - FEAT_LRCPC3 - FEAT_SVE_B16B16 - FEAT_SVE2p1 - FEAT_WFxT It also adds feature detection for FEAT_FPMR. It is somewhat of a special case because FPMR only exists as a feature in LLVM 18, it has been removed from the LLVM upstream. On that account the intention is for it to be detectable at runtime through stdarch but not have a corresponding compile-time Rust target feature. Linux features: https://github.com/torvalds/linux/blob/master/arch/arm64/include/uapi/asm/hwcap.h LLVM features: llvm-project/llvm/lib/Target/AArch64/AArch64.td
This commit is contained in:
Kajetan Puchalski
Amanieu d'Antras
parent
aa84427fd4
commit
dfc5dfc8ef
4 changed files with 190 additions and 9 deletions
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@ -22,22 +22,27 @@ features! {
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/// * `"crc"` - FEAT_CRC
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/// * `"lse"` - FEAT_LSE
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/// * `"lse2"` - FEAT_LSE2
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/// * `"lse128"` - FEAT_LSE128
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/// * `"rdm"` - FEAT_RDM
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/// * `"rcpc"` - FEAT_LRCPC
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/// * `"rcpc2"` - FEAT_LRCPC2
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/// * `"rcpc3"` - FEAT_LRCPC3
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/// * `"dotprod"` - FEAT_DotProd
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/// * `"tme"` - FEAT_TME
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/// * `"fhm"` - FEAT_FHM
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/// * `"dit"` - FEAT_DIT
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/// * `"flagm"` - FEAT_FLAGM
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/// * `"flagm2"` - FEAT_FLAGM2
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/// * `"ssbs"` - FEAT_SSBS & FEAT_SSBS2
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/// * `"sb"` - FEAT_SB
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/// * `"paca"` - FEAT_PAuth (address authentication)
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/// * `"pacg"` - FEAT_Pauth (generic authentication)
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/// * `"dpb"` - FEAT_DPB
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/// * `"dpb2"` - FEAT_DPB2
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/// * `"sve-b16b16"` - FEAT_SVE_B16B16
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/// * `"sve2"` - FEAT_SVE2
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/// * `"sve2-aes"` - FEAT_SVE2_AES
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/// * `"sve2p1"` - FEAT_SVE2p1
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/// * `"sve2-aes"` - FEAT_SVE_AES & FEAT_SVE_PMULL128 (SVE2 AES crypto)
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/// * `"sve2-sm4"` - FEAT_SVE2_SM4
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/// * `"sve2-sha3"` - FEAT_SVE2_SHA3
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/// * `"sve2-bitperm"` - FEAT_SVE2_BitPerm
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@ -55,6 +60,18 @@ features! {
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/// * `"sha2"` - FEAT_SHA1 & FEAT_SHA256
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/// * `"sha3"` - FEAT_SHA512 & FEAT_SHA3
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/// * `"sm4"` - FEAT_SM3 & FEAT_SM4
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/// * `"hbc"` - FEAT_HBC
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/// * `"mops"` - FEAT_MOPS
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/// * `"ecv"` - FEAT_ECV
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/// * `"cssc"` - FEAT_CSSC
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/// * `"fpmr"` - FEAT_FPMR
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/// * `"lut"` - FEAT_LUT
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/// * `"faminmax"` - FEAT_FAMINMAX
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/// * `"fp8"` - FEAT_FP8
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/// * `"fp8fma"` - FEAT_FP8FMA
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/// * `"fp8dot4"` - FEAT_FP8DOT4
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/// * `"fp8dot2"` - FEAT_FP8DOT2
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/// * `"wfxt"` - FEAT_WFxT
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///
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/// [docs]: https://developer.arm.com/documentation/ddi0487/latest
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#[stable(feature = "simd_aarch64", since = "1.60.0")]
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@ -67,6 +84,14 @@ features! {
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@NO_RUNTIME_DETECTION: "v8.5a";
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@NO_RUNTIME_DETECTION: "v8.6a";
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@NO_RUNTIME_DETECTION: "v8.7a";
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@NO_RUNTIME_DETECTION: "v8.8a";
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@NO_RUNTIME_DETECTION: "v8.9a";
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@NO_RUNTIME_DETECTION: "v9.1a";
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@NO_RUNTIME_DETECTION: "v9.2a";
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@NO_RUNTIME_DETECTION: "v9.3a";
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@NO_RUNTIME_DETECTION: "v9.4a";
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@NO_RUNTIME_DETECTION: "v9.5a";
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@NO_RUNTIME_DETECTION: "v9a";
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] asimd: "neon";
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/// FEAT_AdvSIMD (Advanced SIMD/NEON)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] pmull: "pmull";
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@ -85,12 +110,16 @@ features! {
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/// FEAT_LSE (Large System Extension - atomics)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] lse2: "lse2";
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/// FEAT_LSE2 (unaligned and register-pair atomics)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] lse128: "lse128";
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/// FEAT_LSE128 (128-bit atomics)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] rdm: "rdm";
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/// FEAT_RDM (Rounding Doubling Multiply - ASIMDRDM)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] rcpc: "rcpc";
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/// FEAT_LRCPC (Release consistent Processor consistent)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] rcpc2: "rcpc2";
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/// FEAT_LRCPC2 (RCPC with immediate offsets)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] rcpc3: "rcpc3";
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/// FEAT_LRCPC3 (RCPC Instructions v3)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] dotprod: "dotprod";
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/// FEAT_DotProd (Vector Dot-Product - ASIMDDP)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] tme: "tme";
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@ -101,6 +130,8 @@ features! {
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/// FEAT_DIT (Data Independent Timing instructions)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] flagm: "flagm";
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/// FEAT_FLAGM (flag manipulation instructions)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] flagm2: "flagm2";
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/// FEAT_FLAGM2 (flag manipulation instructions)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] ssbs: "ssbs";
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/// FEAT_SSBS & FEAT_SSBS2 (speculative store bypass safe)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sb: "sb";
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@ -115,14 +146,18 @@ features! {
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/// FEAT_DPB2 (aka dcpodp - data cache clean to point of deep persistence)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sve2: "sve2";
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/// FEAT_SVE2 (Scalable Vector Extension 2)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] sve2p1: "sve2p1";
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/// FEAT_SVE2p1 (Scalable Vector Extension 2.1)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sve2_aes: "sve2-aes";
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/// FEAT_SVE_AES (SVE2 AES crypto)
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/// FEAT_SVE_AES & FEAT_SVE_PMULL128 (SVE2 AES crypto)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sve2_sm4: "sve2-sm4";
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/// FEAT_SVE_SM4 (SVE2 SM4 crypto)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sve2_sha3: "sve2-sha3";
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/// FEAT_SVE_SHA3 (SVE2 SHA3 crypto)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sve2_bitperm: "sve2-bitperm";
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/// FEAT_SVE_BitPerm (SVE2 bit permutation instructions)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] sve_b16b16: "sve-b16b16";
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/// FEAT_SVE_B16B16 (SVE or SME Instructions)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] frintts: "frintts";
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/// FEAT_FRINTTS (float to integer rounding instructions)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] i8mm: "i8mm";
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@ -151,4 +186,28 @@ features! {
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/// FEAT_SHA512 & FEAT_SHA3 (SHA2-512 & SHA3 instructions)
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@FEATURE: #[stable(feature = "simd_aarch64", since = "1.60.0")] sm4: "sm4";
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/// FEAT_SM3 & FEAT_SM4 (SM3 & SM4 instructions)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] hbc: "hbc";
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/// FEAT_HBC (Hinted conditional branches)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] mops: "mops";
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/// FEAT_MOPS (Standardization of memory operations)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] ecv: "ecv";
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/// FEAT_ECV (Enhanced Counter Virtualization)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] cssc: "cssc";
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/// FEAT_CSSC (Common Short Sequence Compression instructions)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] fpmr: "fpmr";
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/// FEAT_FPMR (Special-purpose AArch64-FPMR register)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] lut: "lut";
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/// FEAT_LUT (Lookup Table Instructions)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] faminmax: "faminmax";
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/// FEAT_FAMINMAX (FAMIN and FAMAX SIMD/SVE/SME instructions)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] fp8: "fp8";
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/// FEAT_FP8 (F8CVT Instructions)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] fp8fma: "fp8fma";
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/// FEAT_FP8FMA (F8FMA Instructions)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] fp8dot4: "fp8dot4";
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/// FEAT_FP8DOT4 (F8DP4 Instructions)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] fp8dot2: "fp8dot2";
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/// FEAT_FP8DOT2 (F8DP2 Instructions)
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@FEATURE: #[unstable(feature = "stdarch_aarch64_feature_detection", issue = "127764")] wfxt: "wfxt";
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/// FEAT_WFxT (WFET and WFIT Instructions)
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}
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@ -83,11 +83,11 @@ struct AtHwcap {
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dcpodp: bool,
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sve2: bool,
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sveaes: bool,
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// svepmull: No LLVM support.
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svepmull: bool,
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svebitperm: bool,
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svesha3: bool,
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svesm4: bool,
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// flagm2: No LLVM support.
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flagm2: bool,
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frint: bool,
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// svei8mm: See i8mm feature.
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svef32mm: bool,
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@ -99,6 +99,31 @@ struct AtHwcap {
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rng: bool,
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bti: bool,
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mte: bool,
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ecv: bool,
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// afp: bool,
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// rpres: bool,
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// mte3: bool,
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wfxt: bool,
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// ebf16: bool,
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// sveebf16: bool,
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cssc: bool,
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// rprfm: bool,
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sve2p1: bool,
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smeb16b16: bool,
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mops: bool,
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hbc: bool,
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sveb16b16: bool,
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lrcpc3: bool,
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lse128: bool,
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fpmr: bool,
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lut: bool,
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faminmax: bool,
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f8cvt: bool,
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f8fma: bool,
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f8dp4: bool,
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f8dp2: bool,
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f8e4m3: bool,
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f8e5m2: bool,
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}
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impl From<auxvec::AuxVec> for AtHwcap {
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@ -137,14 +162,16 @@ impl From<auxvec::AuxVec> for AtHwcap {
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sb: bit::test(auxv.hwcap, 29),
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paca: bit::test(auxv.hwcap, 30),
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pacg: bit::test(auxv.hwcap, 31),
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// AT_HWCAP2
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dcpodp: bit::test(auxv.hwcap2, 0),
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sve2: bit::test(auxv.hwcap2, 1),
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sveaes: bit::test(auxv.hwcap2, 2),
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// svepmull: bit::test(auxv.hwcap2, 3),
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svepmull: bit::test(auxv.hwcap2, 3),
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svebitperm: bit::test(auxv.hwcap2, 4),
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svesha3: bit::test(auxv.hwcap2, 5),
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svesm4: bit::test(auxv.hwcap2, 6),
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// flagm2: bit::test(auxv.hwcap2, 7),
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flagm2: bit::test(auxv.hwcap2, 7),
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frint: bit::test(auxv.hwcap2, 8),
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// svei8mm: bit::test(auxv.hwcap2, 9),
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svef32mm: bit::test(auxv.hwcap2, 10),
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@ -156,6 +183,31 @@ impl From<auxvec::AuxVec> for AtHwcap {
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rng: bit::test(auxv.hwcap2, 16),
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bti: bit::test(auxv.hwcap2, 17),
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mte: bit::test(auxv.hwcap2, 18),
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ecv: bit::test(auxv.hwcap2, 19),
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// afp: bit::test(auxv.hwcap2, 20),
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// rpres: bit::test(auxv.hwcap2, 21),
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// mte3: bit::test(auxv.hwcap2, 22),
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wfxt: bit::test(auxv.hwcap2, 31),
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// ebf16: bit::test(auxv.hwcap2, 32),
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// sveebf16: bit::test(auxv.hwcap2, 33),
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cssc: bit::test(auxv.hwcap2, 34),
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// rprfm: bit::test(auxv.hwcap2, 35),
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sve2p1: bit::test(auxv.hwcap2, 36),
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smeb16b16: bit::test(auxv.hwcap2, 41),
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mops: bit::test(auxv.hwcap2, 43),
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hbc: bit::test(auxv.hwcap2, 44),
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sveb16b16: bit::test(auxv.hwcap2, 45),
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lrcpc3: bit::test(auxv.hwcap2, 46),
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lse128: bit::test(auxv.hwcap2, 47),
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fpmr: bit::test(auxv.hwcap2, 48),
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lut: bit::test(auxv.hwcap2, 49),
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faminmax: bit::test(auxv.hwcap2, 50),
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f8cvt: bit::test(auxv.hwcap2, 51),
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f8fma: bit::test(auxv.hwcap2, 52),
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f8dp4: bit::test(auxv.hwcap2, 53),
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f8dp2: bit::test(auxv.hwcap2, 54),
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f8e4m3: bit::test(auxv.hwcap2, 55),
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f8e5m2: bit::test(auxv.hwcap2, 56),
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}
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}
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}
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@ -201,14 +253,16 @@ impl From<super::cpuinfo::CpuInfo> for AtHwcap {
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sb: f.has("sb"),
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paca: f.has("paca"),
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pacg: f.has("pacg"),
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// AT_HWCAP2
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dcpodp: f.has("dcpodp"),
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sve2: f.has("sve2"),
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sveaes: f.has("sveaes"),
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// svepmull: f.has("svepmull"),
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svepmull: f.has("svepmull"),
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svebitperm: f.has("svebitperm"),
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svesha3: f.has("svesha3"),
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svesm4: f.has("svesm4"),
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// flagm2: f.has("flagm2"),
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flagm2: f.has("flagm2"),
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frint: f.has("frint"),
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// svei8mm: f.has("svei8mm"),
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svef32mm: f.has("svef32mm"),
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@ -220,6 +274,31 @@ impl From<super::cpuinfo::CpuInfo> for AtHwcap {
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rng: f.has("rng"),
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bti: f.has("bti"),
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mte: f.has("mte"),
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ecv: f.has("ecv"),
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// afp: f.has("afp"),
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// rpres: f.has("rpres"),
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// mte3: f.has("mte3"),
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wfxt: f.has("wfxt"),
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// ebf16: f.has("ebf16"),
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// sveebf16: f.has("sveebf16"),
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cssc: f.has("cssc"),
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// rprfm: f.has("rprfm"),
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sve2p1: f.has("sve2p1"),
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smeb16b16: f.has("smeb16b16"),
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mops: f.has("mops"),
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hbc: f.has("hbc"),
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sveb16b16: f.has("sveb16b16"),
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lrcpc3: f.has("lrcpc3"),
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lse128: f.has("lse128"),
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fpmr: f.has("fpmr"),
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lut: f.has("lut"),
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faminmax: f.has("faminmax"),
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f8cvt: f.has("f8cvt"),
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f8fma: f.has("f8fma"),
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f8dp4: f.has("f8dp4"),
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f8dp2: f.has("f8dp2"),
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f8e4m3: f.has("f8e4m3"),
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f8e5m2: f.has("f8e5m2"),
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}
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}
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}
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@ -267,11 +346,14 @@ impl AtHwcap {
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enable_feature(Feature::crc, self.crc32);
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enable_feature(Feature::lse, self.atomics);
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enable_feature(Feature::lse2, self.uscat);
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enable_feature(Feature::lse128, self.lse128);
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enable_feature(Feature::rcpc, self.lrcpc);
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// RCPC2 (rcpc-immo in LLVM) requires RCPC support
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enable_feature(Feature::rcpc2, self.ilrcpc && self.lrcpc);
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enable_feature(Feature::rcpc3, self.lrcpc3);
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enable_feature(Feature::dit, self.dit);
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enable_feature(Feature::flagm, self.flagm);
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enable_feature(Feature::flagm2, self.flagm2);
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enable_feature(Feature::ssbs, self.ssbs);
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enable_feature(Feature::sb, self.sb);
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enable_feature(Feature::paca, self.paca);
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@ -317,8 +399,12 @@ impl AtHwcap {
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// SVE2 requires SVE
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let sve2 = self.sve2 && self.sve && asimd;
|
||||
enable_feature(Feature::sve2, sve2);
|
||||
enable_feature(Feature::sve2p1, self.sve2p1);
|
||||
// SVE2 extensions require SVE2 and crypto features
|
||||
enable_feature(Feature::sve2_aes, self.sveaes && sve2 && self.aes);
|
||||
enable_feature(
|
||||
Feature::sve2_aes,
|
||||
self.sveaes && self.svepmull && sve2 && self.aes,
|
||||
);
|
||||
enable_feature(
|
||||
Feature::sve2_sm4,
|
||||
self.svesm4 && sve2 && self.sm3 && self.sm4,
|
||||
|
|
@ -328,6 +414,23 @@ impl AtHwcap {
|
|||
self.svesha3 && sve2 && self.sha512 && self.sha3 && self.sha1 && self.sha2,
|
||||
);
|
||||
enable_feature(Feature::sve2_bitperm, self.svebitperm && self.sve2);
|
||||
// SVE_B16B16 can be implemented either for SVE or SME
|
||||
enable_feature(
|
||||
Feature::sve_b16b16,
|
||||
self.bf16 && (self.sveb16b16 || self.smeb16b16),
|
||||
);
|
||||
enable_feature(Feature::hbc, self.hbc);
|
||||
enable_feature(Feature::mops, self.mops);
|
||||
enable_feature(Feature::ecv, self.ecv);
|
||||
enable_feature(Feature::lut, self.lut);
|
||||
enable_feature(Feature::cssc, self.cssc);
|
||||
enable_feature(Feature::fpmr, self.fpmr);
|
||||
enable_feature(Feature::faminmax, self.faminmax);
|
||||
enable_feature(Feature::fp8, self.f8cvt);
|
||||
enable_feature(Feature::fp8fma, self.f8fma);
|
||||
enable_feature(Feature::fp8dot4, self.f8dp4);
|
||||
enable_feature(Feature::fp8dot2, self.f8dp2);
|
||||
enable_feature(Feature::wfxt, self.wfxt);
|
||||
}
|
||||
value
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,6 +1,7 @@
|
|||
#![allow(internal_features)]
|
||||
#![feature(stdarch_internal)]
|
||||
#![cfg_attr(target_arch = "arm", feature(stdarch_arm_feature_detection))]
|
||||
#![cfg_attr(target_arch = "aarch64", feature(stdarch_aarch64_feature_detection))]
|
||||
#![cfg_attr(target_arch = "powerpc", feature(stdarch_powerpc_feature_detection))]
|
||||
#![cfg_attr(target_arch = "powerpc64", feature(stdarch_powerpc_feature_detection))]
|
||||
#![cfg_attr(
|
||||
|
|
@ -67,21 +68,26 @@ fn aarch64_linux() {
|
|||
println!("crc: {}", is_aarch64_feature_detected!("crc"));
|
||||
println!("lse: {}", is_aarch64_feature_detected!("lse"));
|
||||
println!("lse2: {}", is_aarch64_feature_detected!("lse2"));
|
||||
println!("lse128: {}", is_aarch64_feature_detected!("lse128"));
|
||||
println!("rdm: {}", is_aarch64_feature_detected!("rdm"));
|
||||
println!("rcpc: {}", is_aarch64_feature_detected!("rcpc"));
|
||||
println!("rcpc2: {}", is_aarch64_feature_detected!("rcpc2"));
|
||||
println!("rcpc3: {}", is_aarch64_feature_detected!("rcpc3"));
|
||||
println!("dotprod: {}", is_aarch64_feature_detected!("dotprod"));
|
||||
println!("tme: {}", is_aarch64_feature_detected!("tme"));
|
||||
println!("fhm: {}", is_aarch64_feature_detected!("fhm"));
|
||||
println!("dit: {}", is_aarch64_feature_detected!("dit"));
|
||||
println!("flagm: {}", is_aarch64_feature_detected!("flagm"));
|
||||
println!("flagm2: {}", is_aarch64_feature_detected!("flagm2"));
|
||||
println!("ssbs: {}", is_aarch64_feature_detected!("ssbs"));
|
||||
println!("sb: {}", is_aarch64_feature_detected!("sb"));
|
||||
println!("paca: {}", is_aarch64_feature_detected!("paca"));
|
||||
println!("pacg: {}", is_aarch64_feature_detected!("pacg"));
|
||||
println!("dpb: {}", is_aarch64_feature_detected!("dpb"));
|
||||
println!("dpb2: {}", is_aarch64_feature_detected!("dpb2"));
|
||||
println!("sve-b16b16: {}", is_aarch64_feature_detected!("sve-b16b16"));
|
||||
println!("sve2: {}", is_aarch64_feature_detected!("sve2"));
|
||||
println!("sve2p1: {}", is_aarch64_feature_detected!("sve2p1"));
|
||||
println!("sve2-aes: {}", is_aarch64_feature_detected!("sve2-aes"));
|
||||
println!("sve2-sm4: {}", is_aarch64_feature_detected!("sve2-sm4"));
|
||||
println!("sve2-sha3: {}", is_aarch64_feature_detected!("sve2-sha3"));
|
||||
|
|
@ -103,6 +109,18 @@ fn aarch64_linux() {
|
|||
println!("sha2: {}", is_aarch64_feature_detected!("sha2"));
|
||||
println!("sha3: {}", is_aarch64_feature_detected!("sha3"));
|
||||
println!("sm4: {}", is_aarch64_feature_detected!("sm4"));
|
||||
println!("hbc: {}", is_aarch64_feature_detected!("hbc"));
|
||||
println!("mops: {}", is_aarch64_feature_detected!("mops"));
|
||||
println!("ecv: {}", is_aarch64_feature_detected!("ecv"));
|
||||
println!("cssc: {}", is_aarch64_feature_detected!("cssc"));
|
||||
println!("fpmr: {}", is_aarch64_feature_detected!("fpmr"));
|
||||
println!("lut: {}", is_aarch64_feature_detected!("lut"));
|
||||
println!("faminmax: {}", is_aarch64_feature_detected!("faminmax"));
|
||||
println!("fp8: {}", is_aarch64_feature_detected!("fp8"));
|
||||
println!("fp8fma: {}", is_aarch64_feature_detected!("fp8fma"));
|
||||
println!("fp8dot4: {}", is_aarch64_feature_detected!("fp8dot4"));
|
||||
println!("fp8dot2: {}", is_aarch64_feature_detected!("fp8dot2"));
|
||||
println!("wfxt: {}", is_aarch64_feature_detected!("wfxt"));
|
||||
}
|
||||
|
||||
#[test]
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@
|
|||
feature(stdarch_internal)
|
||||
)]
|
||||
#![cfg_attr(target_arch = "arm", feature(stdarch_arm_feature_detection))]
|
||||
#![cfg_attr(target_arch = "aarch64", feature(stdarch_aarch64_feature_detection))]
|
||||
#![cfg_attr(target_arch = "powerpc", feature(stdarch_powerpc_feature_detection))]
|
||||
#![cfg_attr(target_arch = "powerpc64", feature(stdarch_powerpc_feature_detection))]
|
||||
#![allow(clippy::unwrap_used, clippy::use_debug, clippy::print_stdout)]
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue