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Don't expect specific instructions for _mm256_set_pd/_mm_set_ps

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These don't correspond to specific instructions and will produce
different instructions on x86/x86_64 based on ABI details.
This commit is contained in:
Nikita Popov 2026-01-29 10:34:44 +01:00
parent 70a07c91de
commit e164dca633
2 changed files with 1 additions and 2 deletions
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1
library/stdarch/crates/core_arch/src/x86/avx.rs
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@ -2426,7 +2426,6 @@ pub const fn _mm256_setzero_si256() -> __m256i {
#[inline]
#[target_feature(enable = "avx")]
// This intrinsic has no corresponding instruction.
#[cfg_attr(test, assert_instr(vinsertf128))]
#[stable(feature = "simd_x86", since = "1.27.0")]
#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
pub const fn _mm256_set_pd(a: f64, b: f64, c: f64, d: f64) -> __m256d {

2
library/stdarch/crates/core_arch/src/x86/sse.rs
View file

@ -968,7 +968,7 @@ pub const fn _mm_set_ps1(a: f32) -> __m128 {
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_set_ps)
#[inline]
#[target_feature(enable = "sse")]
#[cfg_attr(test, assert_instr(unpcklps))]
// This intrinsic has no corresponding instruction.
#[stable(feature = "simd_x86", since = "1.27.0")]
#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
pub const fn _mm_set_ps(a: f32, b: f32, c: f32, d: f32) -> __m128 {