Add the rdm target feature to the sqrdmlsh intrinsic. (#1285)
This commit is contained in:
Jamie Cunliffe
GitHub
parent
64f4469b23
commit
e75d75e292
4 changed files with 339 additions and 302 deletions
|
|
@ -10534,6 +10534,7 @@ pub unsafe fn vqrdmulhs_laneq_s32<const LANE: i32>(a: i32, b: int32x4_t) -> i32
|
|||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah))]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlah_s16(a: int16x4_t, b: int16x4_t, c: int16x4_t) -> int16x4_t {
|
||||
#[allow(improper_ctypes)]
|
||||
extern "unadjusted" {
|
||||
|
|
@ -10547,6 +10548,7 @@ pub unsafe fn vqrdmlah_s16(a: int16x4_t, b: int16x4_t, c: int16x4_t) -> int16x4_
|
|||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah))]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlahq_s16(a: int16x8_t, b: int16x8_t, c: int16x8_t) -> int16x8_t {
|
||||
#[allow(improper_ctypes)]
|
||||
extern "unadjusted" {
|
||||
|
|
@ -10560,6 +10562,7 @@ pub unsafe fn vqrdmlahq_s16(a: int16x8_t, b: int16x8_t, c: int16x8_t) -> int16x8
|
|||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah))]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlah_s32(a: int32x2_t, b: int32x2_t, c: int32x2_t) -> int32x2_t {
|
||||
#[allow(improper_ctypes)]
|
||||
extern "unadjusted" {
|
||||
|
|
@ -10573,6 +10576,7 @@ pub unsafe fn vqrdmlah_s32(a: int32x2_t, b: int32x2_t, c: int32x2_t) -> int32x2_
|
|||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah))]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlahq_s32(a: int32x4_t, b: int32x4_t, c: int32x4_t) -> int32x4_t {
|
||||
#[allow(improper_ctypes)]
|
||||
extern "unadjusted" {
|
||||
|
|
@ -10586,6 +10590,7 @@ pub unsafe fn vqrdmlahq_s32(a: int32x4_t, b: int32x4_t, c: int32x4_t) -> int32x4
|
|||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah))]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlahh_s16(a: i16, b: i16, c: i16) -> i16 {
|
||||
let a: int16x4_t = vdup_n_s16(a);
|
||||
let b: int16x4_t = vdup_n_s16(b);
|
||||
|
|
@ -10597,6 +10602,7 @@ pub unsafe fn vqrdmlahh_s16(a: i16, b: i16, c: i16) -> i16 {
|
|||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah))]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlahs_s32(a: i32, b: i32, c: i32) -> i32 {
|
||||
let a: int32x2_t = vdup_n_s32(a);
|
||||
let b: int32x2_t = vdup_n_s32(b);
|
||||
|
|
@ -10609,6 +10615,7 @@ pub unsafe fn vqrdmlahs_s32(a: i32, b: i32, c: i32) -> i32 {
|
|||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlah_lane_s16<const LANE: i32>(a: int16x4_t, b: int16x4_t, c: int16x4_t) -> int16x4_t {
|
||||
static_assert_imm2!(LANE);
|
||||
let c: int16x4_t = simd_shuffle4!(c, c, <const LANE: i32> [LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
|
||||
|
|
@ -10620,6 +10627,7 @@ pub unsafe fn vqrdmlah_lane_s16<const LANE: i32>(a: int16x4_t, b: int16x4_t, c:
|
|||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlah_laneq_s16<const LANE: i32>(a: int16x4_t, b: int16x4_t, c: int16x8_t) -> int16x4_t {
|
||||
static_assert_imm3!(LANE);
|
||||
let c: int16x4_t = simd_shuffle4!(c, c, <const LANE: i32> [LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
|
||||
|
|
@ -10631,6 +10639,7 @@ pub unsafe fn vqrdmlah_laneq_s16<const LANE: i32>(a: int16x4_t, b: int16x4_t, c:
|
|||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlahq_lane_s16<const LANE: i32>(a: int16x8_t, b: int16x8_t, c: int16x4_t) -> int16x8_t {
|
||||
static_assert_imm2!(LANE);
|
||||
let c: int16x8_t = simd_shuffle8!(c, c, <const LANE: i32> [LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
|
||||
|
|
@ -10642,6 +10651,7 @@ pub unsafe fn vqrdmlahq_lane_s16<const LANE: i32>(a: int16x8_t, b: int16x8_t, c:
|
|||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlahq_laneq_s16<const LANE: i32>(a: int16x8_t, b: int16x8_t, c: int16x8_t) -> int16x8_t {
|
||||
static_assert_imm3!(LANE);
|
||||
let c: int16x8_t = simd_shuffle8!(c, c, <const LANE: i32> [LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
|
||||
|
|
@ -10653,6 +10663,7 @@ pub unsafe fn vqrdmlahq_laneq_s16<const LANE: i32>(a: int16x8_t, b: int16x8_t, c
|
|||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlah_lane_s32<const LANE: i32>(a: int32x2_t, b: int32x2_t, c: int32x2_t) -> int32x2_t {
|
||||
static_assert_imm1!(LANE);
|
||||
let c: int32x2_t = simd_shuffle2!(c, c, <const LANE: i32> [LANE as u32, LANE as u32]);
|
||||
|
|
@ -10664,6 +10675,7 @@ pub unsafe fn vqrdmlah_lane_s32<const LANE: i32>(a: int32x2_t, b: int32x2_t, c:
|
|||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlah_laneq_s32<const LANE: i32>(a: int32x2_t, b: int32x2_t, c: int32x4_t) -> int32x2_t {
|
||||
static_assert_imm2!(LANE);
|
||||
let c: int32x2_t = simd_shuffle2!(c, c, <const LANE: i32> [LANE as u32, LANE as u32]);
|
||||
|
|
@ -10675,6 +10687,7 @@ pub unsafe fn vqrdmlah_laneq_s32<const LANE: i32>(a: int32x2_t, b: int32x2_t, c:
|
|||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlahq_lane_s32<const LANE: i32>(a: int32x4_t, b: int32x4_t, c: int32x2_t) -> int32x4_t {
|
||||
static_assert_imm1!(LANE);
|
||||
let c: int32x4_t = simd_shuffle4!(c, c, <const LANE: i32> [LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
|
||||
|
|
@ -10686,6 +10699,7 @@ pub unsafe fn vqrdmlahq_lane_s32<const LANE: i32>(a: int32x4_t, b: int32x4_t, c:
|
|||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlahq_laneq_s32<const LANE: i32>(a: int32x4_t, b: int32x4_t, c: int32x4_t) -> int32x4_t {
|
||||
static_assert_imm2!(LANE);
|
||||
let c: int32x4_t = simd_shuffle4!(c, c, <const LANE: i32> [LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
|
||||
|
|
@ -10697,6 +10711,7 @@ pub unsafe fn vqrdmlahq_laneq_s32<const LANE: i32>(a: int32x4_t, b: int32x4_t, c
|
|||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlahh_lane_s16<const LANE: i32>(a: i16, b: i16, c: int16x4_t) -> i16 {
|
||||
static_assert_imm2!(LANE);
|
||||
vqrdmlahh_s16(a, b, simd_extract(c, LANE as u32))
|
||||
|
|
@ -10707,6 +10722,7 @@ pub unsafe fn vqrdmlahh_lane_s16<const LANE: i32>(a: i16, b: i16, c: int16x4_t)
|
|||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlahh_laneq_s16<const LANE: i32>(a: i16, b: i16, c: int16x8_t) -> i16 {
|
||||
static_assert_imm3!(LANE);
|
||||
vqrdmlahh_s16(a, b, simd_extract(c, LANE as u32))
|
||||
|
|
@ -10717,6 +10733,7 @@ pub unsafe fn vqrdmlahh_laneq_s16<const LANE: i32>(a: i16, b: i16, c: int16x8_t)
|
|||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlahs_lane_s32<const LANE: i32>(a: i32, b: i32, c: int32x2_t) -> i32 {
|
||||
static_assert_imm1!(LANE);
|
||||
vqrdmlahs_s32(a, b, simd_extract(c, LANE as u32))
|
||||
|
|
@ -10727,6 +10744,7 @@ pub unsafe fn vqrdmlahs_lane_s32<const LANE: i32>(a: i32, b: i32, c: int32x2_t)
|
|||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlah, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlahs_laneq_s32<const LANE: i32>(a: i32, b: i32, c: int32x4_t) -> i32 {
|
||||
static_assert_imm2!(LANE);
|
||||
vqrdmlahs_s32(a, b, simd_extract(c, LANE as u32))
|
||||
|
|
@ -10734,64 +10752,222 @@ pub unsafe fn vqrdmlahs_laneq_s32<const LANE: i32>(a: i32, b: i32, c: int32x4_t)
|
|||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmulh))]
|
||||
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh))]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlsh_s16(a: int16x4_t, b: int16x4_t, c: int16x4_t) -> int16x4_t {
|
||||
#[allow(improper_ctypes)]
|
||||
extern "unadjusted" {
|
||||
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqrdmlsh.v4i16")]
|
||||
fn vqrdmlsh_s16_(a: int16x4_t, b: int16x4_t, c: int16x4_t) -> int16x4_t;
|
||||
}
|
||||
vqrdmlsh_s16_(a, b, c)
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh))]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlshq_s16(a: int16x8_t, b: int16x8_t, c: int16x8_t) -> int16x8_t {
|
||||
#[allow(improper_ctypes)]
|
||||
extern "unadjusted" {
|
||||
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqrdmlsh.v8i16")]
|
||||
fn vqrdmlshq_s16_(a: int16x8_t, b: int16x8_t, c: int16x8_t) -> int16x8_t;
|
||||
}
|
||||
vqrdmlshq_s16_(a, b, c)
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh))]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlsh_s32(a: int32x2_t, b: int32x2_t, c: int32x2_t) -> int32x2_t {
|
||||
#[allow(improper_ctypes)]
|
||||
extern "unadjusted" {
|
||||
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqrdmlsh.v2i32")]
|
||||
fn vqrdmlsh_s32_(a: int32x2_t, b: int32x2_t, c: int32x2_t) -> int32x2_t;
|
||||
}
|
||||
vqrdmlsh_s32_(a, b, c)
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh))]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlshq_s32(a: int32x4_t, b: int32x4_t, c: int32x4_t) -> int32x4_t {
|
||||
#[allow(improper_ctypes)]
|
||||
extern "unadjusted" {
|
||||
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqrdmlsh.v4i32")]
|
||||
fn vqrdmlshq_s32_(a: int32x4_t, b: int32x4_t, c: int32x4_t) -> int32x4_t;
|
||||
}
|
||||
vqrdmlshq_s32_(a, b, c)
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh))]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlshh_s16(a: i16, b: i16, c: i16) -> i16 {
|
||||
vqsubh_s16(a, vqrdmulhh_s16(b, c))
|
||||
let a: int16x4_t = vdup_n_s16(a);
|
||||
let b: int16x4_t = vdup_n_s16(b);
|
||||
let c: int16x4_t = vdup_n_s16(c);
|
||||
simd_extract(vqrdmlsh_s16(a, b, c), 0)
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmulh))]
|
||||
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh))]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlshs_s32(a: i32, b: i32, c: i32) -> i32 {
|
||||
vqsubs_s32(a, vqrdmulhs_s32(b, c))
|
||||
let a: int32x2_t = vdup_n_s32(a);
|
||||
let b: int32x2_t = vdup_n_s32(b);
|
||||
let c: int32x2_t = vdup_n_s32(c);
|
||||
simd_extract(vqrdmlsh_s32(a, b, c), 0)
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmulh, LANE = 1))]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlsh_lane_s16<const LANE: i32>(a: int16x4_t, b: int16x4_t, c: int16x4_t) -> int16x4_t {
|
||||
static_assert_imm2!(LANE);
|
||||
let c: int16x4_t = simd_shuffle4!(c, c, <const LANE: i32> [LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
|
||||
vqrdmlsh_s16(a, b, c)
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlsh_laneq_s16<const LANE: i32>(a: int16x4_t, b: int16x4_t, c: int16x8_t) -> int16x4_t {
|
||||
static_assert_imm3!(LANE);
|
||||
let c: int16x4_t = simd_shuffle4!(c, c, <const LANE: i32> [LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
|
||||
vqrdmlsh_s16(a, b, c)
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlshq_lane_s16<const LANE: i32>(a: int16x8_t, b: int16x8_t, c: int16x4_t) -> int16x8_t {
|
||||
static_assert_imm2!(LANE);
|
||||
let c: int16x8_t = simd_shuffle8!(c, c, <const LANE: i32> [LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
|
||||
vqrdmlshq_s16(a, b, c)
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlshq_laneq_s16<const LANE: i32>(a: int16x8_t, b: int16x8_t, c: int16x8_t) -> int16x8_t {
|
||||
static_assert_imm3!(LANE);
|
||||
let c: int16x8_t = simd_shuffle8!(c, c, <const LANE: i32> [LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
|
||||
vqrdmlshq_s16(a, b, c)
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlsh_lane_s32<const LANE: i32>(a: int32x2_t, b: int32x2_t, c: int32x2_t) -> int32x2_t {
|
||||
static_assert_imm1!(LANE);
|
||||
let c: int32x2_t = simd_shuffle2!(c, c, <const LANE: i32> [LANE as u32, LANE as u32]);
|
||||
vqrdmlsh_s32(a, b, c)
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlsh_laneq_s32<const LANE: i32>(a: int32x2_t, b: int32x2_t, c: int32x4_t) -> int32x2_t {
|
||||
static_assert_imm2!(LANE);
|
||||
let c: int32x2_t = simd_shuffle2!(c, c, <const LANE: i32> [LANE as u32, LANE as u32]);
|
||||
vqrdmlsh_s32(a, b, c)
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlshq_lane_s32<const LANE: i32>(a: int32x4_t, b: int32x4_t, c: int32x2_t) -> int32x4_t {
|
||||
static_assert_imm1!(LANE);
|
||||
let c: int32x4_t = simd_shuffle4!(c, c, <const LANE: i32> [LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
|
||||
vqrdmlshq_s32(a, b, c)
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlshq_laneq_s32<const LANE: i32>(a: int32x4_t, b: int32x4_t, c: int32x4_t) -> int32x4_t {
|
||||
static_assert_imm2!(LANE);
|
||||
let c: int32x4_t = simd_shuffle4!(c, c, <const LANE: i32> [LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
|
||||
vqrdmlshq_s32(a, b, c)
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlshh_lane_s16<const LANE: i32>(a: i16, b: i16, c: int16x4_t) -> i16 {
|
||||
static_assert_imm2!(LANE);
|
||||
vqsubh_s16(a, vqrdmulhh_lane_s16::<LANE>(b, c))
|
||||
vqrdmlshh_s16(a, b, simd_extract(c, LANE as u32))
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmulh, LANE = 1))]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlshh_laneq_s16<const LANE: i32>(a: i16, b: i16, c: int16x8_t) -> i16 {
|
||||
static_assert_imm3!(LANE);
|
||||
vqsubh_s16(a, vqrdmulhh_laneq_s16::<LANE>(b, c))
|
||||
vqrdmlshh_s16(a, b, simd_extract(c, LANE as u32))
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmulh, LANE = 1))]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlshs_lane_s32<const LANE: i32>(a: i32, b: i32, c: int32x2_t) -> i32 {
|
||||
static_assert_imm1!(LANE);
|
||||
vqsubs_s32(a, vqrdmulhs_lane_s32::<LANE>(b, c))
|
||||
vqrdmlshs_s32(a, b, simd_extract(c, LANE as u32))
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmulh, LANE = 1))]
|
||||
#[target_feature(enable = "rdm")]
|
||||
#[cfg_attr(test, assert_instr(sqrdmlsh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
|
||||
#[stable(feature = "rdm_intrinsics", since = "1.62.0")]
|
||||
pub unsafe fn vqrdmlshs_laneq_s32<const LANE: i32>(a: i32, b: i32, c: int32x4_t) -> i32 {
|
||||
static_assert_imm2!(LANE);
|
||||
vqsubs_s32(a, vqrdmulhs_laneq_s32::<LANE>(b, c))
|
||||
vqrdmlshs_s32(a, b, simd_extract(c, LANE as u32))
|
||||
}
|
||||
|
||||
/// Signed saturating rounding shift left
|
||||
|
|
@ -22342,6 +22518,46 @@ mod test {
|
|||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlsh_s16() {
|
||||
let a: i16x4 = i16x4::new(1, 1, 1, 1);
|
||||
let b: i16x4 = i16x4::new(0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF);
|
||||
let c: i16x4 = i16x4::new(2, 2, 2, 2);
|
||||
let e: i16x4 = i16x4::new(-1, -1, -1, -1);
|
||||
let r: i16x4 = transmute(vqrdmlsh_s16(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlshq_s16() {
|
||||
let a: i16x8 = i16x8::new(1, 1, 1, 1, 1, 1, 1, 1);
|
||||
let b: i16x8 = i16x8::new(0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF);
|
||||
let c: i16x8 = i16x8::new(2, 2, 2, 2, 2, 2, 2, 2);
|
||||
let e: i16x8 = i16x8::new(-1, -1, -1, -1, -1, -1, -1, -1);
|
||||
let r: i16x8 = transmute(vqrdmlshq_s16(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlsh_s32() {
|
||||
let a: i32x2 = i32x2::new(1, 1);
|
||||
let b: i32x2 = i32x2::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF);
|
||||
let c: i32x2 = i32x2::new(2, 2);
|
||||
let e: i32x2 = i32x2::new(-1, -1);
|
||||
let r: i32x2 = transmute(vqrdmlsh_s32(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlshq_s32() {
|
||||
let a: i32x4 = i32x4::new(1, 1, 1, 1);
|
||||
let b: i32x4 = i32x4::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x7F_FF_FF_FF);
|
||||
let c: i32x4 = i32x4::new(2, 2, 2, 2);
|
||||
let e: i32x4 = i32x4::new(-1, -1, -1, -1);
|
||||
let r: i32x4 = transmute(vqrdmlshq_s32(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlshh_s16() {
|
||||
let a: i16 = 1;
|
||||
|
|
@ -22362,6 +22578,86 @@ mod test {
|
|||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlsh_lane_s16() {
|
||||
let a: i16x4 = i16x4::new(1, 1, 1, 1);
|
||||
let b: i16x4 = i16x4::new(0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF);
|
||||
let c: i16x4 = i16x4::new(0, 2, 0, 0);
|
||||
let e: i16x4 = i16x4::new(-1, -1, -1, -1);
|
||||
let r: i16x4 = transmute(vqrdmlsh_lane_s16::<1>(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlsh_laneq_s16() {
|
||||
let a: i16x4 = i16x4::new(1, 1, 1, 1);
|
||||
let b: i16x4 = i16x4::new(0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF);
|
||||
let c: i16x8 = i16x8::new(0, 2, 0, 0, 0, 0, 0, 0);
|
||||
let e: i16x4 = i16x4::new(-1, -1, -1, -1);
|
||||
let r: i16x4 = transmute(vqrdmlsh_laneq_s16::<1>(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlshq_lane_s16() {
|
||||
let a: i16x8 = i16x8::new(1, 1, 1, 1, 1, 1, 1, 1);
|
||||
let b: i16x8 = i16x8::new(0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF);
|
||||
let c: i16x4 = i16x4::new(0, 2, 0, 0);
|
||||
let e: i16x8 = i16x8::new(-1, -1, -1, -1, -1, -1, -1, -1);
|
||||
let r: i16x8 = transmute(vqrdmlshq_lane_s16::<1>(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlshq_laneq_s16() {
|
||||
let a: i16x8 = i16x8::new(1, 1, 1, 1, 1, 1, 1, 1);
|
||||
let b: i16x8 = i16x8::new(0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF);
|
||||
let c: i16x8 = i16x8::new(0, 2, 0, 0, 0, 0, 0, 0);
|
||||
let e: i16x8 = i16x8::new(-1, -1, -1, -1, -1, -1, -1, -1);
|
||||
let r: i16x8 = transmute(vqrdmlshq_laneq_s16::<1>(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlsh_lane_s32() {
|
||||
let a: i32x2 = i32x2::new(1, 1);
|
||||
let b: i32x2 = i32x2::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF);
|
||||
let c: i32x2 = i32x2::new(0, 2);
|
||||
let e: i32x2 = i32x2::new(-1, -1);
|
||||
let r: i32x2 = transmute(vqrdmlsh_lane_s32::<1>(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlsh_laneq_s32() {
|
||||
let a: i32x2 = i32x2::new(1, 1);
|
||||
let b: i32x2 = i32x2::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF);
|
||||
let c: i32x4 = i32x4::new(0, 2, 0, 0);
|
||||
let e: i32x2 = i32x2::new(-1, -1);
|
||||
let r: i32x2 = transmute(vqrdmlsh_laneq_s32::<1>(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlshq_lane_s32() {
|
||||
let a: i32x4 = i32x4::new(1, 1, 1, 1);
|
||||
let b: i32x4 = i32x4::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x7F_FF_FF_FF);
|
||||
let c: i32x2 = i32x2::new(0, 2);
|
||||
let e: i32x4 = i32x4::new(-1, -1, -1, -1);
|
||||
let r: i32x4 = transmute(vqrdmlshq_lane_s32::<1>(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlshq_laneq_s32() {
|
||||
let a: i32x4 = i32x4::new(1, 1, 1, 1);
|
||||
let b: i32x4 = i32x4::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x7F_FF_FF_FF);
|
||||
let c: i32x4 = i32x4::new(0, 2, 0, 0);
|
||||
let e: i32x4 = i32x4::new(-1, -1, -1, -1);
|
||||
let r: i32x4 = transmute(vqrdmlshq_laneq_s32::<1>(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlshh_lane_s16() {
|
||||
let a: i16 = 1;
|
||||
|
|
|
|||
|
|
@ -17627,154 +17627,6 @@ pub unsafe fn vqrdmulhq_laneq_s32<const LANE: i32>(a: int32x4_t, b: int32x4_t) -
|
|||
vqrdmulhq_s32(a, b)
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
|
||||
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vqrdmulh))]
|
||||
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqrdmulh))]
|
||||
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
|
||||
pub unsafe fn vqrdmlsh_s16(a: int16x4_t, b: int16x4_t, c: int16x4_t) -> int16x4_t {
|
||||
vqsub_s16(a, vqrdmulh_s16(b, c))
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
|
||||
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vqrdmulh))]
|
||||
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqrdmulh))]
|
||||
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
|
||||
pub unsafe fn vqrdmlshq_s16(a: int16x8_t, b: int16x8_t, c: int16x8_t) -> int16x8_t {
|
||||
vqsubq_s16(a, vqrdmulhq_s16(b, c))
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
|
||||
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vqrdmulh))]
|
||||
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqrdmulh))]
|
||||
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
|
||||
pub unsafe fn vqrdmlsh_s32(a: int32x2_t, b: int32x2_t, c: int32x2_t) -> int32x2_t {
|
||||
vqsub_s32(a, vqrdmulh_s32(b, c))
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
|
||||
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vqrdmulh))]
|
||||
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqrdmulh))]
|
||||
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
|
||||
pub unsafe fn vqrdmlshq_s32(a: int32x4_t, b: int32x4_t, c: int32x4_t) -> int32x4_t {
|
||||
vqsubq_s32(a, vqrdmulhq_s32(b, c))
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
|
||||
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vqrdmulh, LANE = 1))]
|
||||
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqrdmulh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
|
||||
pub unsafe fn vqrdmlsh_lane_s16<const LANE: i32>(a: int16x4_t, b: int16x4_t, c: int16x4_t) -> int16x4_t {
|
||||
static_assert_imm2!(LANE);
|
||||
vqsub_s16(a, vqrdmulh_lane_s16::<LANE>(b, c))
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
|
||||
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vqrdmulh, LANE = 1))]
|
||||
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqrdmulh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
|
||||
pub unsafe fn vqrdmlsh_laneq_s16<const LANE: i32>(a: int16x4_t, b: int16x4_t, c: int16x8_t) -> int16x4_t {
|
||||
static_assert_imm3!(LANE);
|
||||
vqsub_s16(a, vqrdmulh_laneq_s16::<LANE>(b, c))
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
|
||||
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vqrdmulh, LANE = 1))]
|
||||
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqrdmulh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
|
||||
pub unsafe fn vqrdmlshq_lane_s16<const LANE: i32>(a: int16x8_t, b: int16x8_t, c: int16x4_t) -> int16x8_t {
|
||||
static_assert_imm2!(LANE);
|
||||
vqsubq_s16(a, vqrdmulhq_lane_s16::<LANE>(b, c))
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
|
||||
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vqrdmulh, LANE = 1))]
|
||||
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqrdmulh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
|
||||
pub unsafe fn vqrdmlshq_laneq_s16<const LANE: i32>(a: int16x8_t, b: int16x8_t, c: int16x8_t) -> int16x8_t {
|
||||
static_assert_imm3!(LANE);
|
||||
vqsubq_s16(a, vqrdmulhq_laneq_s16::<LANE>(b, c))
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
|
||||
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vqrdmulh, LANE = 1))]
|
||||
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqrdmulh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
|
||||
pub unsafe fn vqrdmlsh_lane_s32<const LANE: i32>(a: int32x2_t, b: int32x2_t, c: int32x2_t) -> int32x2_t {
|
||||
static_assert_imm1!(LANE);
|
||||
vqsub_s32(a, vqrdmulh_lane_s32::<LANE>(b, c))
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
|
||||
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vqrdmulh, LANE = 1))]
|
||||
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqrdmulh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
|
||||
pub unsafe fn vqrdmlsh_laneq_s32<const LANE: i32>(a: int32x2_t, b: int32x2_t, c: int32x4_t) -> int32x2_t {
|
||||
static_assert_imm2!(LANE);
|
||||
vqsub_s32(a, vqrdmulh_laneq_s32::<LANE>(b, c))
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
|
||||
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vqrdmulh, LANE = 1))]
|
||||
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqrdmulh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
|
||||
pub unsafe fn vqrdmlshq_lane_s32<const LANE: i32>(a: int32x4_t, b: int32x4_t, c: int32x2_t) -> int32x4_t {
|
||||
static_assert_imm1!(LANE);
|
||||
vqsubq_s32(a, vqrdmulhq_lane_s32::<LANE>(b, c))
|
||||
}
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
|
||||
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vqrdmulh, LANE = 1))]
|
||||
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqrdmulh, LANE = 1))]
|
||||
#[rustc_legacy_const_generics(3)]
|
||||
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
|
||||
pub unsafe fn vqrdmlshq_laneq_s32<const LANE: i32>(a: int32x4_t, b: int32x4_t, c: int32x4_t) -> int32x4_t {
|
||||
static_assert_imm2!(LANE);
|
||||
vqsubq_s32(a, vqrdmulhq_laneq_s32::<LANE>(b, c))
|
||||
}
|
||||
|
||||
/// Signed saturating rounding shift left
|
||||
#[inline]
|
||||
#[target_feature(enable = "neon")]
|
||||
|
|
@ -36134,126 +35986,6 @@ mod test {
|
|||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlsh_s16() {
|
||||
let a: i16x4 = i16x4::new(1, 1, 1, 1);
|
||||
let b: i16x4 = i16x4::new(0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF);
|
||||
let c: i16x4 = i16x4::new(2, 2, 2, 2);
|
||||
let e: i16x4 = i16x4::new(-1, -1, -1, -1);
|
||||
let r: i16x4 = transmute(vqrdmlsh_s16(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlshq_s16() {
|
||||
let a: i16x8 = i16x8::new(1, 1, 1, 1, 1, 1, 1, 1);
|
||||
let b: i16x8 = i16x8::new(0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF);
|
||||
let c: i16x8 = i16x8::new(2, 2, 2, 2, 2, 2, 2, 2);
|
||||
let e: i16x8 = i16x8::new(-1, -1, -1, -1, -1, -1, -1, -1);
|
||||
let r: i16x8 = transmute(vqrdmlshq_s16(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlsh_s32() {
|
||||
let a: i32x2 = i32x2::new(1, 1);
|
||||
let b: i32x2 = i32x2::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF);
|
||||
let c: i32x2 = i32x2::new(2, 2);
|
||||
let e: i32x2 = i32x2::new(-1, -1);
|
||||
let r: i32x2 = transmute(vqrdmlsh_s32(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlshq_s32() {
|
||||
let a: i32x4 = i32x4::new(1, 1, 1, 1);
|
||||
let b: i32x4 = i32x4::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x7F_FF_FF_FF);
|
||||
let c: i32x4 = i32x4::new(2, 2, 2, 2);
|
||||
let e: i32x4 = i32x4::new(-1, -1, -1, -1);
|
||||
let r: i32x4 = transmute(vqrdmlshq_s32(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlsh_lane_s16() {
|
||||
let a: i16x4 = i16x4::new(1, 1, 1, 1);
|
||||
let b: i16x4 = i16x4::new(0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF);
|
||||
let c: i16x4 = i16x4::new(0, 2, 0, 0);
|
||||
let e: i16x4 = i16x4::new(-1, -1, -1, -1);
|
||||
let r: i16x4 = transmute(vqrdmlsh_lane_s16::<1>(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlsh_laneq_s16() {
|
||||
let a: i16x4 = i16x4::new(1, 1, 1, 1);
|
||||
let b: i16x4 = i16x4::new(0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF);
|
||||
let c: i16x8 = i16x8::new(0, 2, 0, 0, 0, 0, 0, 0);
|
||||
let e: i16x4 = i16x4::new(-1, -1, -1, -1);
|
||||
let r: i16x4 = transmute(vqrdmlsh_laneq_s16::<1>(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlshq_lane_s16() {
|
||||
let a: i16x8 = i16x8::new(1, 1, 1, 1, 1, 1, 1, 1);
|
||||
let b: i16x8 = i16x8::new(0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF);
|
||||
let c: i16x4 = i16x4::new(0, 2, 0, 0);
|
||||
let e: i16x8 = i16x8::new(-1, -1, -1, -1, -1, -1, -1, -1);
|
||||
let r: i16x8 = transmute(vqrdmlshq_lane_s16::<1>(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlshq_laneq_s16() {
|
||||
let a: i16x8 = i16x8::new(1, 1, 1, 1, 1, 1, 1, 1);
|
||||
let b: i16x8 = i16x8::new(0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF);
|
||||
let c: i16x8 = i16x8::new(0, 2, 0, 0, 0, 0, 0, 0);
|
||||
let e: i16x8 = i16x8::new(-1, -1, -1, -1, -1, -1, -1, -1);
|
||||
let r: i16x8 = transmute(vqrdmlshq_laneq_s16::<1>(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlsh_lane_s32() {
|
||||
let a: i32x2 = i32x2::new(1, 1);
|
||||
let b: i32x2 = i32x2::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF);
|
||||
let c: i32x2 = i32x2::new(0, 2);
|
||||
let e: i32x2 = i32x2::new(-1, -1);
|
||||
let r: i32x2 = transmute(vqrdmlsh_lane_s32::<1>(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlsh_laneq_s32() {
|
||||
let a: i32x2 = i32x2::new(1, 1);
|
||||
let b: i32x2 = i32x2::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF);
|
||||
let c: i32x4 = i32x4::new(0, 2, 0, 0);
|
||||
let e: i32x2 = i32x2::new(-1, -1);
|
||||
let r: i32x2 = transmute(vqrdmlsh_laneq_s32::<1>(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlshq_lane_s32() {
|
||||
let a: i32x4 = i32x4::new(1, 1, 1, 1);
|
||||
let b: i32x4 = i32x4::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x7F_FF_FF_FF);
|
||||
let c: i32x2 = i32x2::new(0, 2);
|
||||
let e: i32x4 = i32x4::new(-1, -1, -1, -1);
|
||||
let r: i32x4 = transmute(vqrdmlshq_lane_s32::<1>(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrdmlshq_laneq_s32() {
|
||||
let a: i32x4 = i32x4::new(1, 1, 1, 1);
|
||||
let b: i32x4 = i32x4::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x7F_FF_FF_FF);
|
||||
let c: i32x4 = i32x4::new(0, 2, 0, 0);
|
||||
let e: i32x4 = i32x4::new(-1, -1, -1, -1);
|
||||
let r: i32x4 = transmute(vqrdmlshq_laneq_s32::<1>(transmute(a), transmute(b), transmute(c)));
|
||||
assert_eq!(r, e);
|
||||
}
|
||||
|
||||
#[simd_test(enable = "neon")]
|
||||
unsafe fn test_vqrshl_s8() {
|
||||
let a: i8x8 = i8x8::new(2, -128, 0x7F, 3, 4, 5, 6, 7);
|
||||
|
|
|
|||
|
|
@ -5588,25 +5588,29 @@ generate i16:i16:int16x4_t:i16, i16:i16:int16x8_t:i16, i32:i32:int32x2_t:i32, i3
|
|||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
name = vqrdmlsh
|
||||
multi_fn = vqsub-out-noext, a, {vqrdmulh-out-noext, b, c}
|
||||
link-aarch64 = sqrdmlsh._EXT_
|
||||
a = 1, 1, 1, 1, 1, 1, 1, 1
|
||||
b = MAX, MAX, MAX, MAX, MAX, MAX, MAX, MAX
|
||||
c = 2, 2, 2, 2, 2, 2, 2, 2
|
||||
validate -1, -1, -1, -1, -1, -1, -1, -1
|
||||
|
||||
aarch64 = sqrdmulh
|
||||
arm = vqrdmulh
|
||||
aarch64 = sqrdmlsh
|
||||
target = rdm
|
||||
generate int16x4_t, int16x8_t, int32x2_t, int32x4_t
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
name = vqrdmlsh
|
||||
multi_fn = vqsub-self-noext, a, {vqrdmulh-self-noext, b, c}
|
||||
multi_fn = vdup_n-in_ntt-noext, a:in_ntt, a
|
||||
multi_fn = vdup_n-in_ntt-noext, b:in_ntt, b
|
||||
multi_fn = vdup_n-in_ntt-noext, c:in_ntt, c
|
||||
multi_fn = simd_extract, {vqrdmlsh-in_ntt-noext, a, b, c}, 0
|
||||
a = 1
|
||||
b = 1
|
||||
c = 2
|
||||
validate 1
|
||||
|
||||
aarch64 = sqrdmulh
|
||||
aarch64 = sqrdmlsh
|
||||
target = rdm
|
||||
generate i16, i32
|
||||
|
||||
/// Signed saturating rounding doubling multiply subtract returning high half
|
||||
|
|
@ -5614,15 +5618,16 @@ name = vqrdmlsh
|
|||
in2-lane-suffixes
|
||||
constn = LANE
|
||||
multi_fn = static_assert_imm-in2_exp_len-LANE
|
||||
multi_fn = vqsub-self-noext, a, {vqrdmulh-in2lane-::<LANE>, b, c}
|
||||
multi_fn = simd_shuffle-out_len-!, c:out_t, c, c, {dup-out_len-LANE as u32}
|
||||
multi_fn = vqrdmlsh-out-noext, a, b, c
|
||||
a = 1, 1, 1, 1, 1, 1, 1, 1
|
||||
b = MAX, MAX, MAX, MAX, MAX, MAX, MAX, MAX
|
||||
c = 0, 2, 0, 0, 0, 0, 0, 0
|
||||
n = 1
|
||||
validate -1, -1, -1, -1, -1, -1, -1, -1
|
||||
|
||||
aarch64 = sqrdmulh
|
||||
arm = vqrdmulh
|
||||
aarch64 = sqrdmlsh
|
||||
target = rdm
|
||||
generate int16x4_t, int16x4_t:int16x4_t:int16x8_t:int16x4_t, int16x8_t:int16x8_t:int16x4_t:int16x8_t, int16x8_t
|
||||
generate int32x2_t, int32x2_t:int32x2_t:int32x4_t:int32x2_t, int32x4_t:int32x4_t:int32x2_t:int32x4_t, int32x4_t
|
||||
|
||||
|
|
@ -5631,14 +5636,15 @@ name = vqrdmlsh
|
|||
in2-lane-suffixes
|
||||
constn = LANE
|
||||
multi_fn = static_assert_imm-in2_exp_len-LANE
|
||||
multi_fn = vqsub-self-noext, a, {vqrdmulh-in2lane-::<LANE>, b, c}
|
||||
multi_fn = vqrdmlsh-self-noext, a, b, {simd_extract, c, LANE as u32}
|
||||
a = 1
|
||||
b = 1
|
||||
c = 0, 2, 0, 0, 0, 0, 0, 0
|
||||
n = 1
|
||||
validate 1
|
||||
|
||||
aarch64 = sqrdmulh
|
||||
aarch64 = sqrdmlsh
|
||||
target = rdm
|
||||
generate i16:i16:int16x4_t:i16, i16:i16:int16x8_t:i16, i32:i32:int32x2_t:i32, i32:i32:int32x4_t:i32
|
||||
|
||||
/// Signed saturating rounding shift left
|
||||
|
|
|
|||
|
|
@ -1371,6 +1371,7 @@ fn gen_aarch64(
|
|||
Default | ArmV7 | Vfp4 | FPArmV8 | AES => {
|
||||
String::from("\n#[stable(feature = \"neon_intrinsics\", since = \"1.59.0\")]")
|
||||
}
|
||||
RDM => String::from("\n#[stable(feature = \"rdm_intrinsics\", since = \"1.62.0\")]"),
|
||||
_ => String::new(),
|
||||
};
|
||||
let function = format!(
|
||||
|
|
@ -2338,6 +2339,7 @@ fn gen_arm(
|
|||
Default | ArmV7 | Vfp4 | FPArmV8 | AES => {
|
||||
String::from("\n#[stable(feature = \"neon_intrinsics\", since = \"1.59.0\")]")
|
||||
}
|
||||
RDM => String::from("\n#[stable(feature = \"rdm_intrinsics\", since = \"1.62.0\")]"),
|
||||
_ => String::new(),
|
||||
};
|
||||
format!(
|
||||
|
|
@ -2405,6 +2407,7 @@ fn gen_arm(
|
|||
};
|
||||
let stable_aarch64 = match target {
|
||||
Default | ArmV7 | Vfp4 | FPArmV8 | AES => String::from("\n#[cfg_attr(target_arch = \"aarch64\", stable(feature = \"neon_intrinsics\", since = \"1.59.0\"))]"),
|
||||
RDM => String::from("\n#[cfg_attr(target_arch = \"aarch64\", stable(feature = \"rdm_intrinsics\", since = \"1.62.0\"))]"),
|
||||
_ => String::new(),
|
||||
};
|
||||
format!(
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue