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convert _mm512_mask_dbsad_epu8 to const generics

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Rémy Rakic 2021-03-05 00:57:08 +01:00 • committed by Amanieu d'Antras
parent e3c19f432f
commit eda755e064
1 changed files with 7 additions and 12 deletions
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19
library/stdarch/crates/core_arch/src/x86/avx512bw.rs
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@ -7880,23 +7880,18 @@ pub unsafe fn _mm512_dbsad_epu8<const IMM8: i32>(a: __m512i, b: __m512i) -> __m5
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_dbsad_epu8&expand=2115)
#[inline]
#[target_feature(enable = "avx512bw")]
#[rustc_args_required_const(4)]
#[cfg_attr(test, assert_instr(vdbpsadbw, imm8 = 0))]
pub unsafe fn _mm512_mask_dbsad_epu8(
#[rustc_legacy_const_generics(4)]
#[cfg_attr(test, assert_instr(vdbpsadbw, IMM8 = 0))]
pub unsafe fn _mm512_mask_dbsad_epu8<const IMM8: i32>(
src: __m512i,
k: __mmask32,
a: __m512i,
b: __m512i,
imm8: i32,
) -> __m512i {
static_assert_imm8!(IMM8);
let a = a.as_u8x64();
let b = b.as_u8x64();
macro_rules! call {
($imm8:expr) => {
vdbpsadbw(a, b, $imm8)
};
}
let r = constify_imm8_sae!(imm8, call);
let r = vdbpsadbw(a, b, IMM8);
transmute(simd_select_bitmask(k, r, src.as_u16x32()))
}
@ -16876,9 +16871,9 @@ mod tests {
let src = _mm512_set1_epi16(1);
let a = _mm512_set1_epi8(2);
let b = _mm512_set1_epi8(4);
let r = _mm512_mask_dbsad_epu8(src, 0, a, b, 0);
let r = _mm512_mask_dbsad_epu8::<0>(src, 0, a, b);
assert_eq_m512i(r, src);
let r = _mm512_mask_dbsad_epu8(src, 0b11111111_11111111_11111111_11111111, a, b, 0);
let r = _mm512_mask_dbsad_epu8::<0>(src, 0b11111111_11111111_11111111_11111111, a, b);
let e = _mm512_set1_epi16(8);
assert_eq_m512i(r, e);
}