From fcf4a7e5c87cf80ff8d7c142fbdfd8fd398ad3a7 Mon Sep 17 00:00:00 2001 From: Alexis Beingessner Date: Tue, 7 Jul 2015 21:31:09 -0700 Subject: [PATCH] oops --- atomics.md | 2 -- 1 file changed, 2 deletions(-) diff --git a/atomics.md b/atomics.md index 2a080adc2bc6..69c0874dc186 100644 --- a/atomics.md +++ b/atomics.md @@ -89,8 +89,6 @@ However there's a third potential state that the hardware enables: * `y = 2`: (thread 2 saw `x = 2`, but not `y = 3`, and then overwrote `y = 3`) -``` - It's worth noting that different kinds of CPU provide different guarantees. It is common to seperate hardware into two categories: strongly-ordered and weakly- ordered. Most notably x86/64 provides strong ordering guarantees, while ARM and