Add AArch64 SHA/AES.
This commit is contained in:
Jason Davies
gnzlbg
parent
273fc1c344
commit
fd5fd85608
2 changed files with 431 additions and 0 deletions
428
library/stdarch/coresimd/aarch64/crypto.rs
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428
library/stdarch/coresimd/aarch64/crypto.rs
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@ -0,0 +1,428 @@
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use coresimd::arm::uint32x4_t;
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use coresimd::arm::uint8x16_t;
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#[allow(improper_ctypes)]
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extern "C" {
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#[link_name = "llvm.aarch64.crypto.aese"]
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fn vaeseq_u8_(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t;
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#[link_name = "llvm.aarch64.crypto.aesd"]
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fn vaesdq_u8_(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t;
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#[link_name = "llvm.aarch64.crypto.aesmc"]
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fn vaesmcq_u8_(data: uint8x16_t) -> uint8x16_t;
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#[link_name = "llvm.aarch64.crypto.aesimc"]
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fn vaesimcq_u8_(data: uint8x16_t) -> uint8x16_t;
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#[link_name = "llvm.aarch64.crypto.sha1h"]
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fn vsha1h_u32_(hash_e: u32) -> u32;
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#[link_name = "llvm.aarch64.crypto.sha1su0"]
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fn vsha1su0q_u32_(
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w0_3: uint32x4_t, w4_7: uint32x4_t, w8_11: uint32x4_t
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) -> uint32x4_t;
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#[link_name = "llvm.aarch64.crypto.sha1su1"]
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fn vsha1su1q_u32_(tw0_3: uint32x4_t, w12_15: uint32x4_t) -> uint32x4_t;
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#[link_name = "llvm.aarch64.crypto.sha1c"]
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fn vsha1cq_u32_(
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hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t
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) -> uint32x4_t;
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#[link_name = "llvm.aarch64.crypto.sha1p"]
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fn vsha1pq_u32_(
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hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t
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) -> uint32x4_t;
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#[link_name = "llvm.aarch64.crypto.sha1m"]
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fn vsha1mq_u32_(
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hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t
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) -> uint32x4_t;
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#[link_name = "llvm.aarch64.crypto.sha256h"]
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fn vsha256hq_u32_(
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hash_abcd: uint32x4_t, hash_efgh: uint32x4_t, wk: uint32x4_t
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) -> uint32x4_t;
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#[link_name = "llvm.aarch64.crypto.sha256h2"]
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fn vsha256h2q_u32_(
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hash_efgh: uint32x4_t, hash_abcd: uint32x4_t, wk: uint32x4_t
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) -> uint32x4_t;
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#[link_name = "llvm.aarch64.crypto.sha256su0"]
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fn vsha256su0q_u32_(w0_3: uint32x4_t, w4_7: uint32x4_t) -> uint32x4_t;
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#[link_name = "llvm.aarch64.crypto.sha256su1"]
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fn vsha256su1q_u32_(
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tw0_3: uint32x4_t, w8_11: uint32x4_t, w12_15: uint32x4_t
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) -> uint32x4_t;
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}
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#[cfg(test)]
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use stdsimd_test::assert_instr;
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/// AES single round encryption.
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#[inline]
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#[target_feature(enable = "crypto")]
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#[cfg_attr(test, assert_instr(aese))]
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pub unsafe fn vaeseq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t {
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vaeseq_u8_(data, key)
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}
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/// AES single round decryption.
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#[inline]
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#[target_feature(enable = "crypto")]
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#[cfg_attr(test, assert_instr(aesd))]
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pub unsafe fn vaesdq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t {
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vaesdq_u8_(data, key)
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}
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/// AES mix columns.
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#[inline]
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#[target_feature(enable = "crypto")]
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#[cfg_attr(test, assert_instr(aesmc))]
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pub unsafe fn vaesmcq_u8(data: uint8x16_t) -> uint8x16_t {
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vaesmcq_u8_(data)
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}
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/// AES inverse mix columns.
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#[inline]
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#[target_feature(enable = "crypto")]
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#[cfg_attr(test, assert_instr(aesimc))]
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pub unsafe fn vaesimcq_u8(data: uint8x16_t) -> uint8x16_t {
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vaesimcq_u8_(data)
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}
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/// SHA1 fixed rotate.
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#[inline]
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#[target_feature(enable = "crypto")]
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#[cfg_attr(test, assert_instr(sha1h))]
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pub unsafe fn vsha1h_u32(hash_e: u32) -> u32 {
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vsha1h_u32_(hash_e)
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}
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/// SHA1 hash update accelerator, choose.
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#[inline]
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#[target_feature(enable = "crypto")]
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#[cfg_attr(test, assert_instr(sha1c))]
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pub unsafe fn vsha1cq_u32(
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hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t
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) -> uint32x4_t {
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vsha1cq_u32_(hash_abcd, hash_e, wk)
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}
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/// SHA1 hash update accelerator, majority.
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#[inline]
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#[target_feature(enable = "crypto")]
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#[cfg_attr(test, assert_instr(sha1m))]
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pub unsafe fn vsha1mq_u32(
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hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t
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) -> uint32x4_t {
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vsha1mq_u32_(hash_abcd, hash_e, wk)
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}
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/// SHA1 hash update accelerator, parity.
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#[inline]
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#[target_feature(enable = "crypto")]
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#[cfg_attr(test, assert_instr(sha1p))]
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pub unsafe fn vsha1pq_u32(
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hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t
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) -> uint32x4_t {
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vsha1pq_u32_(hash_abcd, hash_e, wk)
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}
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/// SHA1 schedule update accelerator, first part.
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#[inline]
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#[target_feature(enable = "crypto")]
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#[cfg_attr(test, assert_instr(sha1su0))]
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pub unsafe fn vsha1su0q_u32(
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w0_3: uint32x4_t, w4_7: uint32x4_t, w8_11: uint32x4_t
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) -> uint32x4_t {
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vsha1su0q_u32_(w0_3, w4_7, w8_11)
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}
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/// SHA1 schedule update accelerator, second part.
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#[inline]
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#[target_feature(enable = "crypto")]
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#[cfg_attr(test, assert_instr(sha1su1))]
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pub unsafe fn vsha1su1q_u32(
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tw0_3: uint32x4_t, w12_15: uint32x4_t
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) -> uint32x4_t {
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vsha1su1q_u32_(tw0_3, w12_15)
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}
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/// SHA256 hash update accelerator.
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#[inline]
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#[target_feature(enable = "crypto")]
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#[cfg_attr(test, assert_instr(sha256h))]
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pub unsafe fn vsha256hq_u32(
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hash_abcd: uint32x4_t, hash_efgh: uint32x4_t, wk: uint32x4_t
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) -> uint32x4_t {
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vsha256hq_u32_(hash_abcd, hash_efgh, wk)
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}
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/// SHA256 hash update accelerator, upper part.
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#[inline]
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#[target_feature(enable = "crypto")]
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#[cfg_attr(test, assert_instr(sha256h2))]
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pub unsafe fn vsha256h2q_u32(
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hash_efgh: uint32x4_t, hash_abcd: uint32x4_t, wk: uint32x4_t
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) -> uint32x4_t {
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vsha256h2q_u32_(hash_efgh, hash_abcd, wk)
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}
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/// SHA256 schedule update accelerator, first part.
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#[inline]
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#[target_feature(enable = "crypto")]
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#[cfg_attr(test, assert_instr(sha256su0))]
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pub unsafe fn vsha256su0q_u32(
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w0_3: uint32x4_t, w4_7: uint32x4_t
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) -> uint32x4_t {
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vsha256su0q_u32_(w0_3, w4_7)
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}
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/// SHA256 schedule update accelerator, second part.
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#[inline]
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#[target_feature(enable = "crypto")]
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#[cfg_attr(test, assert_instr(sha256su1))]
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pub unsafe fn vsha256su1q_u32(
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tw0_3: uint32x4_t, w8_11: uint32x4_t, w12_15: uint32x4_t
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) -> uint32x4_t {
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vsha256su1q_u32_(tw0_3, w8_11, w12_15)
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}
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#[cfg(test)]
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mod tests {
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use stdsimd_test::simd_test;
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use simd::*;
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use coresimd::aarch64::*;
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use std::mem;
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#[simd_test = "crypto"]
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unsafe fn test_vaeseq_u8() {
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let data = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8)
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.into_bits();
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let key = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7)
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.into_bits();
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let r: u8x16 = vaeseq_u8(data, key).into_bits();
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assert_eq!(
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r,
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u8x16::new(
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124,
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123,
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124,
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118,
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124,
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123,
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124,
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197,
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124,
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123,
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124,
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118,
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124,
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123,
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124,
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197
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)
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);
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}
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#[simd_test = "crypto"]
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unsafe fn test_vaesdq_u8() {
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let data = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8)
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.into_bits();
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let key = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7)
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.into_bits();
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let r: u8x16 = vaesdq_u8(data, key).into_bits();
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assert_eq!(
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r,
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u8x16::new(
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9,
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213,
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9,
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251,
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9,
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213,
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9,
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56,
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9,
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213,
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9,
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251,
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9,
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213,
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9,
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56
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)
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);
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}
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#[simd_test = "crypto"]
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unsafe fn test_vaesmcq_u8() {
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let data = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8)
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.into_bits();
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let r: u8x16 = vaesmcq_u8(data).into_bits();
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assert_eq!(
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r,
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u8x16::new(
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3,
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4,
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9,
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10,
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15,
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8,
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21,
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30,
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3,
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4,
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9,
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10,
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15,
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8,
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21,
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30
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)
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);
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}
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#[simd_test = "crypto"]
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unsafe fn test_vaesimcq_u8() {
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let data = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8)
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.into_bits();
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let r: u8x16 = vaesimcq_u8(data).into_bits();
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assert_eq!(
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r,
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u8x16::new(
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43,
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60,
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33,
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50,
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103,
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80,
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125,
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70,
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43,
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60,
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33,
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50,
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103,
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80,
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125,
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70
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)
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);
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}
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#[simd_test = "crypto"]
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unsafe fn test_vsha1h_u32() {
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assert_eq!(vsha1h_u32(0x1234), 0x048d);
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assert_eq!(vsha1h_u32(0x5678), 0x159e);
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}
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#[simd_test = "crypto"]
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unsafe fn test_vsha1su0q_u32() {
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let r: u32x4 = vsha1su0q_u32(
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u32x4::new(0x1234_u32, 0x5678_u32, 0x9abc_u32, 0xdef0_u32)
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.into_bits(),
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u32x4::new(0x1234_u32, 0x5678_u32, 0x9abc_u32, 0xdef0_u32)
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.into_bits(),
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u32x4::new(0x1234_u32, 0x5678_u32, 0x9abc_u32, 0xdef0_u32)
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.into_bits(),
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).into_bits();
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assert_eq!(r, u32x4::new(0x9abc, 0xdef0, 0x1234, 0x5678));
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}
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#[simd_test = "crypto"]
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unsafe fn test_vsha1su1q_u32() {
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let r: u32x4 = vsha1su1q_u32(
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u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
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u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
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).into_bits();
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assert_eq!(
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r,
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u32x4::new(0x00008898, 0x00019988, 0x00008898, 0x0000acd0)
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);
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}
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#[simd_test = "crypto"]
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unsafe fn test_vsha1cq_u32() {
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let r: u32x4 = vsha1cq_u32(
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u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
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0x1234,
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u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
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).into_bits();
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assert_eq!(
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r,
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u32x4::new(0x8a32cbd8, 0x0c518a96, 0x0018a081, 0x0000c168)
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);
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}
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#[simd_test = "crypto"]
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unsafe fn test_vsha1pq_u32() {
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let r: u32x4 = vsha1pq_u32(
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u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
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0x1234,
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u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
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).into_bits();
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assert_eq!(
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r,
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u32x4::new(0x469f0ba3, 0x0a326147, 0x80145d7f, 0x00009f47)
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);
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}
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#[simd_test = "crypto"]
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unsafe fn test_vsha1mq_u32() {
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let r: u32x4 = vsha1mq_u32(
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u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
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0x1234,
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u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
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).into_bits();
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assert_eq!(
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r,
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u32x4::new(0xaa39693b, 0x0d51bf84, 0x001aa109, 0x0000d278)
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);
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}
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#[simd_test = "crypto"]
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unsafe fn test_vsha256hq_u32() {
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let r: u32x4 = vsha256hq_u32(
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u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
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u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
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u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
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).into_bits();
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assert_eq!(
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r,
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u32x4::new(0x05e9aaa8, 0xec5f4c02, 0x20a1ea61, 0x28738cef)
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);
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}
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#[simd_test = "crypto"]
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unsafe fn test_vsha256h2q_u32() {
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let r: u32x4 = vsha256h2q_u32(
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u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
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u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
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u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
|
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).into_bits();
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assert_eq!(
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r,
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u32x4::new(0x3745362e, 0x2fb51d00, 0xbd4c529b, 0x968b8516)
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);
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}
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#[simd_test = "crypto"]
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unsafe fn test_vsha256su0q_u32() {
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let r: u32x4 = vsha256su0q_u32(
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u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
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u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
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).into_bits();
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assert_eq!(
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r,
|
||||
u32x4::new(0xe59e1c97, 0x5eaf68da, 0xd7bcb51f, 0x6c8de152)
|
||||
);
|
||||
}
|
||||
|
||||
#[simd_test = "crypto"]
|
||||
unsafe fn test_vsha256su1q_u32() {
|
||||
let r: u32x4 = vsha256su1q_u32(
|
||||
u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
|
||||
u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
|
||||
u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0).into_bits(),
|
||||
).into_bits();
|
||||
assert_eq!(
|
||||
r,
|
||||
u32x4::new(0x5e09e8d2, 0x74a6f16b, 0xc966606b, 0xa686ee9f)
|
||||
);
|
||||
}
|
||||
}
|
||||
|
|
@ -13,3 +13,6 @@ pub use self::v8::*;
|
|||
|
||||
mod neon;
|
||||
pub use self::neon::*;
|
||||
|
||||
mod crypto;
|
||||
pub use self::crypto::*;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue