convert _mm512_mask_srli_epi16 to const generics

This commit is contained in:
Rémy Rakic 2021-03-05 00:09:50 +01:00 committed by Amanieu d'Antras
parent ce9ea45d29
commit fdbe7fcb05

View file

@ -5342,16 +5342,16 @@ pub unsafe fn _mm512_srli_epi16<const IMM8: u32>(a: __m512i) -> __m512i {
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_srli_epi16&expand=5511)
#[inline]
#[target_feature(enable = "avx512bw")]
#[cfg_attr(test, assert_instr(vpsrlw, imm8 = 5))]
#[rustc_args_required_const(3)]
pub unsafe fn _mm512_mask_srli_epi16(src: __m512i, k: __mmask32, a: __m512i, imm8: u32) -> __m512i {
#[cfg_attr(test, assert_instr(vpsrlw, IMM8 = 5))]
#[rustc_legacy_const_generics(3)]
pub unsafe fn _mm512_mask_srli_epi16<const IMM8: u32>(
src: __m512i,
k: __mmask32,
a: __m512i,
) -> __m512i {
static_assert_imm_u8!(IMM8);
let a = a.as_i16x32();
macro_rules! call {
($imm8:expr) => {
vpsrliw(a, $imm8)
};
}
let shf = constify_imm8_sae!(imm8, call);
let shf = vpsrliw(a, IMM8);
transmute(simd_select_bitmask(k, shf, src.as_i16x32()))
}
@ -14708,9 +14708,9 @@ mod tests {
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_mask_srli_epi16() {
let a = _mm512_set1_epi16(1 << 1);
let r = _mm512_mask_srli_epi16(a, 0, a, 2);
let r = _mm512_mask_srli_epi16::<2>(a, 0, a);
assert_eq_m512i(r, a);
let r = _mm512_mask_srli_epi16(a, 0b11111111_11111111_11111111_11111111, a, 2);
let r = _mm512_mask_srli_epi16::<2>(a, 0b11111111_11111111_11111111_11111111, a);
let e = _mm512_set1_epi16(0);
assert_eq_m512i(r, e);
}