Commit graph

11 commits

Author SHA1 Message Date
Paul Murphy
a1f4caf467 Restrict spe_acc to PowerPC SPE targets
Update the tests, add powerpc-*-gnuspe testing, and create a distinct
clobber_abi list for PowerPC SPE targets.

Note, the SPE target does not have vector, vector-scalar, or
floating-point specific registers.
2025-12-05 08:37:22 -06:00
Paul Murphy
5f6fa960c2 Relax r29 inline asm restriction on PowerPC64 targets
LLVM uses r29 to hold a base pointer for some PowerPC target
configurations. It is usable on all 64 bit targets as a callee
save register.
2025-11-04 12:08:19 -06:00
Ralf Jung
3796f7de57 compiletest: rename add-core-stubs to add-minicore 2025-11-02 16:20:06 +01:00
Jesus Checa Hidalgo
d75b2ba783 Remove needs-asm-support directive in tests with explicit targets
The `needs-asm-support` directive checks whether the host architecture
supports inline assembly, not the target architecture. For tests that
explicitly specify a target via `--target` in their compile-flags, this
directive is incorrect and unnecessary.

These tests are cross-compiling to specific targets (like x86_64, arm,
aarch64, riscv, etc.) that are already known to have stable asm support.
The directive was causing these tests to be incorrectly skipped on hosts
that don't support asm, even though the target does.

Tests with explicit targets should rely on `needs-llvm-components` to
ensure the appropriate backend is available, rather than checking host
asm support.

Improve documentation about `needs-asm-support` directive.
2025-10-16 14:05:04 +02:00
Paul Murphy
3c09d4a582 Allow vector-scalar (vs) registers in ppc inline assembly
Where supported, VSX is a 64x128b register set which encompasses
both the floating point and vector registers.

In the type tests, xvsqrtdp is used as it is the only two-argument
vsx opcode supported by all targets on llvm. If you need to copy
a vsx register, the preferred way is "xxlor xt, xa, xa".
2025-10-14 09:52:56 -05:00
Guillaume Gomez
a8051a6ca3 Ignore more failing ui tests for GCC backend 2025-10-13 15:30:26 +02:00
Taiki Endo
f4b876867d Support ctr and lr as clobber-only registers in PowerPC inline assembly 2025-09-21 13:48:22 +09:00
Taiki Endo
86e0eabc8d tests/ui/asm: Remove uses of rustc_attrs, lang_items, and decl_macro features by using minicore 2024-12-17 01:12:36 +09:00
Taiki Endo
df8feb5067 Support floats in input/output in vector registers of PowerPC inline assembly 2024-11-29 03:10:07 +09:00
Taiki Endo
0f8ebba54a Support #[repr(simd)] types in input/output of PowerPC inline assembly 2024-11-29 00:24:36 +09:00
Taiki Endo
d19517dcd0 Support clobber_abi and vector registers (clobber-only) in PowerPC inline assembly 2024-11-02 20:26:08 +09:00