Commit graph

21 commits

Author SHA1 Message Date
bjorn3
3f43ee2407 Merge apply_attrs_callsite into call and invoke
Some codegen backends are not able to apply callsite attrs after the fact.
2022-10-01 17:01:31 +00:00
Ellis Hoag
7fc07caf67 Add UnwindingInlineAsm 2022-09-24 10:24:48 -07:00
Antoni Boucher
fac57d9a06 Merge commit 'e8dca3e87d' into sync_from_cg_gcc 2022-06-06 22:04:37 -04:00
Connor Horman
084d2d7c49 Handle tmm_reg in rustc_codegen_gcc 2022-05-17 06:34:58 -04:00
Dylan DPC
63e9911e56 Rollup merge of #95740 - Amanieu:kreg0, r=nagisa
asm: Add a kreg0 register class on x86 which includes k0

Previously we only exposed a kreg register class which excludes the k0
register since it can't be used in many instructions. However k0 is a
valid register and we need to have a way of marking it as clobbered for
clobber_abi.

Fixes #94977
2022-04-19 22:57:39 +02:00
Amanieu d'Antras
52cd51f3ec asm: Add a kreg0 register class on x86 which includes k0
Previously we only exposed a kreg register class which excludes the k0
register since it can't be used in many instructions. However k0 is a
valid register and we need to have a way of marking it as clobbered for
clobber_abi.

Fixes #94977
2022-04-19 17:14:23 +02:00
Amanieu d'Antras
0e31b92112 Add codegen for global_asm! sym operands 2022-04-15 14:36:30 +01:00
William D. Jones
94dc3753aa Add preliminary support for inline assembly for msp430. 2022-01-22 23:42:46 -05:00
bjorn3
47c311a705 Use Symbol for target features in asm handling
This saves a couple of Symbol::intern calls
2022-01-17 18:06:27 +01:00
Tomasz Miąsko
68cbb46913 Remove deprecated LLVM-style inline assembly 2022-01-12 18:51:31 +01:00
bjorn3
54d2ec1a82 Merge commit '1411a98352' into sync_cg_clif-2021-12-31 2021-12-31 16:26:32 +01:00
Amanieu d'Antras
0d936e19c9 Remove the reg_thumb register class for asm! on ARM
Also restricts r8-r14 from being used on Thumb1 targets as per #90736.
2021-12-07 23:54:09 +00:00
Andrew Dona-Couch
4e68093d8c Implement inline asm! for AVR platform 2021-12-06 01:02:49 -05:00
cynecx
4fa64fd1c3 rustc_codegen_gcc: proper check for may_unwind 2021-12-03 23:51:49 +01:00
cynecx
b7cb08d4e7 rustc_codegen_gcc: error on unwinding inline asm 2021-12-03 23:51:49 +01:00
Yuki Okushi
8094e2e5ae Properly check target_features not to trigger an assertion 2021-10-26 11:02:51 +09:00
Commeownist
4e7e822f39
Impove handling of registers in inline asm (#82)
* Correctly handle st(0) register in the clobbers list
* Gate the clobbers based on enabled target features
2021-09-26 09:30:45 -04:00
Commeownist
48d60ab7c5
Update to nightly-2021-09-11 (#79)
* Implement `black_box` as intrinsic

Responsibility of implementing the black box is now lies on backend

* Remove some TODOs

* Update to nightly-2021-09-17

* CI: don't fail on warnings
2021-09-17 17:19:25 -04:00
Commeownist
7c707e4b95
Implement basic inline asm support (#72)
* Implement basic support for inline assembly

* Disable LTO

We don't support it yet at all

* Handle `inout(reg) var` correctly

Turns out that `+` readwrite output registers cannot be tied with
input variables.

* Add limited support for llvm_asm!

* Handle CHANNEL correctly

* Add support for arbitrary explicit registers

* Handle symbols properly

* Add rudimentary asm tests

* Exclude llvm_asm! tests from tests runs

* Insert `__builtin_unreachable()` after diverging asm blocks
2021-09-05 11:26:01 -04:00
antoyo
e228f0c16e
Cleanup (#67) 2021-08-15 08:28:46 -04:00
Antoni Boucher
afae271d5d Initial commit 2021-08-12 21:46:50 -04:00