Commit graph

60 commits

Author SHA1 Message Date
Mara Bos
494c563f3b
Rollup merge of #88350 - programmerjake:add-ppc-cr-xer-clobbers, r=Amanieu
add support for clobbering xer, cr, and cr[0-7] for asm! on OpenPower/PowerPC

Fixes #88315
2021-09-01 09:23:26 +02:00
Jacob Lifshay
5802f60355 add support for clobbering xer, cr, and cr[0-7] for asm! on OpenPower/PowerPC
Fixes #88315
2021-08-25 22:08:27 -07:00
linux1
4a9ba65ca9 Feat: added explicit register tests; added prefix to check_reg asm string 2021-08-24 12:41:49 -04:00
linux1
96381d390d Fix: added necessary prefix 2021-08-23 21:53:23 -04:00
linux1
0c9e23c7ce Fix: appeased x.py test tidy --bless 2021-08-22 17:55:03 -04:00
linux1
eeb0b52bf8 Feat: further testing & support for i64 general register use 2021-08-22 17:55:03 -04:00
linux1
66e95b17ec Fix: moved #[no_mangle] 2021-08-22 17:55:03 -04:00
linux1
7095dfffc3 Refactor: added #[no_mangle] 2021-08-22 17:55:03 -04:00
linux1
5f5afba5fb Feat: added s390x reg-definitions, constraint codes, and tests 2021-08-22 17:55:03 -04:00
Simonas Kazlauskas
493fe8008b Re-Annotate the tests with needs-llvm-components
Doesn't work though, because compiletest doesn't process ignores on a
per-revision manner.
2021-06-24 23:13:08 +03:00
bors
f434217aab Auto merge of #79608 - alessandrod:bpf, r=nagisa
BPF target support

This adds `bpfel-unknown-none` and `bpfeb-unknown-none`, two new no_std targets that generate little and big endian BPF. The approach taken is very similar to the cuda target, where `TargetOptions::obj_is_bitcode` is enabled and code generation is done by the linker.

I added the targets to `dist-various-2`. There are [some tests](https://github.com/alessandrod/bpf-linker/tree/main/tests/assembly) in bpf-linker and I'm planning to add more. Those are currently not ran as part of rust CI.
2021-06-06 01:02:32 +00:00
Alessandro Decina
ec0382e404 BPF: add assembly test 2021-05-29 21:53:06 +10:00
Boris-Chengbiao Zhou
4a76934aa7 Fix static relocation model for PowerPC64
We now also use `should_assume_dso_local()` for declarations and port two
additional cases from clang:
- Exclude PPC64 [1]
- Exclude thread-local variables [2]

[1]: 033138ea45/clang/lib/CodeGen/CodeGenModule.cpp (L1038-L1040)
[2]: 033138ea45/clang/lib/CodeGen/CodeGenModule.cpp (L1048-L1050)
2021-05-28 03:48:39 +02:00
bors
be8450eec8 Auto merge of #85276 - Bobo1239:more_dso_local, r=nagisa
Set dso_local for more items

Related to https://github.com/rust-lang/rust/pull/83592. (cc `@nagisa)`

Noticed that on x86_64 with `relocation-model: static` `R_X86_64_GOTPCREL` relocations were still generated in some cases. (related: https://github.com/Rust-for-Linux/linux/issues/135; Rust-for-Linux needs these fixes to successfully build)

First time doing anything with LLVM so not sure whether this is correct but the following are some of the things I've tried to convince myself.

## C equivalent

Example from clang which also sets `dso_local` in these cases:
`clang-12 -fno-PIC -S -emit-llvm test.c`
```C
extern int A;

int* a() {
    return &A;
}

int B;

int* b() {
    return &B;
}
```
```
; ModuleID = 'test.c'
source_filename = "test.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

`@A` = external dso_local global i32, align 4
`@B` = dso_local global i32 0, align 4

; Function Attrs: noinline nounwind optnone uwtable
define dso_local i32* `@a()` #0 {
  ret i32* `@A`
}

; Function Attrs: noinline nounwind optnone uwtable
define dso_local i32* `@b()` #0 {
  ret i32* `@B`
}

attributes #0 = { noinline nounwind optnone uwtable "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" "unsafe-fp-math"="false" "use-soft-float"="false" }

!llvm.module.flags = !{!0}
!llvm.ident = !{!1}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{!"clang version 12.0.0 (https://github.com/llvm/llvm-project/ b978a93635b584db380274d7c8963c73989944a1)"}
```
`clang-12 -fno-PIC -c test.c`
`objdump test.o -r`:
```
test.o:     file format elf64-x86-64

RELOCATION RECORDS FOR [.text]:
OFFSET           TYPE              VALUE
0000000000000006 R_X86_64_64       A
0000000000000016 R_X86_64_64       B

RELOCATION RECORDS FOR [.eh_frame]:
OFFSET           TYPE              VALUE
0000000000000020 R_X86_64_PC32     .text
0000000000000040 R_X86_64_PC32     .text+0x0000000000000010
```

## Comparison to pre-LLVM 12 output

`rustc --emit=obj,llvm-ir --target=x86_64-unknown-none-linuxkernel --crate-type rlib test.rs`
```Rust
#![feature(no_core, lang_items)]
#![no_core]

#[lang="sized"]
trait Sized {}

#[lang="sync"]
trait Sync {}

#[lang = "drop_in_place"]
pub unsafe fn drop_in_place<T: ?Sized>(_: *mut T) {}

impl Sync for i32 {}

pub static STATIC: i32 = 32;

extern {
    pub static EXT_STATIC: i32;
}

pub fn a() -> &'static i32 {
    &STATIC
}
pub fn b() -> &'static i32 {
    unsafe {&EXT_STATIC}
}
```
`objdump test.o -r`
nightly-2021-02-20 (rustc target is `x86_64-linux-kernel`):
```
RELOCATION RECORDS FOR [.text._ZN4test1a17h1024ba65f3424175E]:
OFFSET           TYPE              VALUE
0000000000000007 R_X86_64_32S      _ZN4test6STATIC17h3adc41a83746c9ffE

RELOCATION RECORDS FOR [.text._ZN4test1b17h86a6a80c1190ac8dE]:
OFFSET           TYPE              VALUE
0000000000000007 R_X86_64_32S      EXT_STATIC
```
nightly-2021-05-10:
```
RELOCATION RECORDS FOR [.text._ZN4test1a17he846f03bf37b2d20E]:
OFFSET           TYPE              VALUE
0000000000000007 R_X86_64_GOTPCREL  _ZN4test6STATIC17h5a059515bf3d4968E-0x0000000000000004

RELOCATION RECORDS FOR [.text._ZN4test1b17h7e0f7f80fbd91125E]:
OFFSET           TYPE              VALUE
0000000000000007 R_X86_64_GOTPCREL  EXT_STATIC-0x0000000000000004
```
This PR:
```
RELOCATION RECORDS FOR [.text._ZN4test1a17he846f03bf37b2d20E]:
OFFSET           TYPE              VALUE
0000000000000007 R_X86_64_32S      _ZN4test6STATIC17h5a059515bf3d4968E

RELOCATION RECORDS FOR [.text._ZN4test1b17h7e0f7f80fbd91125E]:
OFFSET           TYPE              VALUE
0000000000000007 R_X86_64_32S      EXT_STATIC
```
2021-05-19 07:25:17 +00:00
Boris-Chengbiao Zhou
f7ed4a799a Set dso_local for more items 2021-05-18 20:13:24 +02:00
Boris-Chengbiao Zhou
46985d5d91 Fix assembly test from #83592
The test case wasn't actually checked for x64 due to a small difference in the name.
2021-05-18 20:12:59 +02:00
Dr. Chat
69acee3ffe Add asm!() support for PowerPC64 2021-05-13 22:31:47 -05:00
Amanieu d'Antras
5a229e0e20 Add tests for global_asm! 2021-05-13 22:31:58 +01:00
Dr. Chat
b1bb5d662c Add initial asm!() support for PowerPC
This includes GPRs and FPRs only
2021-05-11 19:04:16 -05:00
Felix S. Klock II
db4c544434 Remove tests introduced or cahnged by PR #77885, which is reverted in this PR. 2021-04-29 15:13:36 -04:00
hyd-dev
2fd4dd20d7
Allow using -C force-unwind-tables=no when panic=unwind 2021-04-11 22:32:40 +08:00
bors
0c7d4effd7 Auto merge of #83592 - nagisa:nagisa/dso_local, r=davidtwco
Set dso_local for hidden, private and local items

This should probably have no real effect in most cases, as e.g. `hidden`
visibility already implies `dso_local` (or at least LLVM IR does not
preserve the `dso_local` setting if the item is already `hidden`), but
it should fix `-Crelocation-model=static` and improve codegen in
executables.

Note that this PR does not exhaustively port the logic in [clang], only the
portion that is necessary to fix a regression from LLVM 12 that relates to
`-Crelocation_model=static`.

Fixes #83335

[clang]: 3001d080c8/clang/lib/CodeGen/CodeGenModule.cpp (L945-L1039)
2021-04-06 02:09:01 +00:00
Amanieu d'Antras
b1bcff0731 Disallow the use of high byte registes as operands on x86_64
They are still allowed on x86 though.

Fixes #83495
2021-04-05 13:38:24 +01:00
Simonas Kazlauskas
2f000a78bf Manually set dso_local when its valid to do so
This should have no real effect in most cases, as e.g. `hidden`
visibility already implies `dso_local` (or at least LLVM IR does not
preserve the `dso_local` setting if the item is already `hidden`), but
it should fix `-Crelocation-model=static` and improve codegen in
executables.

Note that this PR does not exhaustively port the logic in [clang]. Only
the obviously correct portion and what is necessary to fix a regression
from LLVM 12 that relates to `-Crelocation_model=static`.

Fixes #83335

[clang]: 3001d080c8/clang/lib/CodeGen/CodeGenModule.cpp (L945-L1039)
2021-04-03 00:00:29 +03:00
Amanieu d'Antras
62e7331bd2 Mark inline asm tests as requiring LLVM 10.0.1 2021-03-25 20:21:58 +00:00
Simonas Kazlauskas
72fb4379d5 Adjust -Ctarget-cpu=native handling in cg_llvm
When cg_llvm encounters the `-Ctarget-cpu=native` it computes an
explciit set of features that applies to the target in order to
correctly compile code for the host CPU (because e.g. `skylake` alone is
not sufficient to tell if some of the instructions are available or
not).

However there were a couple of issues with how we did this. Firstly, the
order in which features were overriden wasn't quite right – conceptually
you'd expect `-Ctarget-cpu=native` option to override the features that
are implicitly set by the target definition. However due to how other
`-Ctarget-cpu` values are handled we must adopt the following order
of priority:

* Features from -Ctarget-cpu=*; are overriden by
* Features implied by --target; are overriden by
* Features from -Ctarget-feature; are overriden by
* function specific features.

Another problem was in that the function level `target-features`
attribute would overwrite the entire set of the globally enabled
features, rather than just the features the
`#[target_feature(enable/disable)]` specified. With something like
`-Ctarget-cpu=native` we'd end up in a situation wherein a function
without `#[target_feature(enable)]` annotation would have a broader
set of features compared to a function with one such attribute. This
turned out to be a cause of heavy run-time regressions in some code
using these function-level attributes in conjunction with
`-Ctarget-cpu=native`, for example.

With this PR rustc is more careful about specifying the entire set of
features for functions that use `#[target_feature(enable/disable)]` or
`#[instruction_set]` attributes.

Sadly testing the original reproducer for this behaviour is quite
impossible – we cannot rely on `-Ctarget-cpu=native` to be anything in
particular on developer or CI machines.
2021-03-16 21:32:55 +02:00
Nikita Popov
55f345f325 Support LLVM 12 in rustc 2021-02-28 10:19:44 +01:00
Johnathan Van Why
fd21eb18e9 32-bit ARM: Emit lr instead of r14 when specified as an asm! output register.
On 32-bit ARM platforms, the register `r14` has the alias `lr`. When used as an output register in `asm!`, rustc canonicalizes the name to `r14`. LLVM only knows the register by the name `lr`, and rejects it. This changes rustc's LLVM code generation to output `lr` instead.
2021-02-14 23:41:10 -08:00
Erik Desjardins
cd25807223 Use probe-stack=inline-asm in LLVM 11+ 2021-01-14 22:49:16 -05:00
Gus Caplan
d9f237caa6
Add wasm32 support to inline asm 2020-12-01 12:18:21 -06:00
Lzu Tao
79f477bb1f Add asm! support for mips64 2020-10-04 12:01:21 +00:00
Lzu Tao
6cb062dacf mips32: Add f64 hard-float support
co-authored-by: Amanieu <amanieu@gmail.com>
2020-10-04 03:35:52 +00:00
Lzu Tao
446f86e370 Remove useless stringify 2020-09-30 04:33:23 +00:00
bors
6369a98ebd Auto merge of #77008 - fortanix:raoul/lvi-tests, r=Mark-Simulacrum
LVI hardening tests

Mitigating the speculative execution LVI attack against SGX enclaves requires compiler changes (i.e., adding lfences). This pull requests adds various tests to check if this happens correctly.
2020-09-28 03:28:04 +00:00
Lzu Tao
9000710959 Add MIPS asm! support
This patch also:
* Add soft-float supports: only f32
* zero-extend i8/i16 to i32 because MIPS only supports register-length
  arithmetic.
* Update table in asm! chapter in unstable book.
2020-09-27 02:36:50 +00:00
Raoul Strackx
7d3c3fdc1d cleaning up code 2020-09-25 15:13:55 +02:00
Raoul Strackx
8ca26cca29 Building libunwind with new CMakeLists.
The old CMakeLists file of libunwind used the C compiler to compile assembly files. This caused such code not to be hardened.
2020-09-25 15:09:57 +02:00
Raoul Strackx
4d1d0c6bd7 skeleton check module level assembly 2020-09-25 15:02:14 +02:00
Raoul Strackx
bca8e07ef4 rust inline assembly lvi hardening test 2020-09-25 15:02:07 +02:00
Raoul Strackx
cd31f40b6f generic load hardening test 2020-09-22 13:54:15 +02:00
Raoul Strackx
a13239dac2 generic ret hardening test 2020-09-22 13:54:14 +02:00
Amanieu d'Antras
9ae5e95b28 Fix test 2020-08-28 18:53:09 +01:00
Amanieu d'Antras
178c1bbb5b Fix a typo in #75781 2020-08-26 10:49:15 +01:00
Josh Stone
a210a29303 Expand RISCV pseudo-instructions to match LLVM 11 2020-08-22 13:44:54 -07:00
Amanieu d'Antras
4fe4c3b7e3 Add regression test 2020-08-21 19:52:48 +01:00
Amanieu d'Antras
9198e8ad62 Work around LLVM issues with explicit register in inline asm
Fixes #74658
2020-08-03 10:43:09 +01:00
Vadim Petrochenkov
d3277b927a compiletest: Support ignoring tests requiring missing LLVM components 2020-08-02 20:35:24 +03:00
Brian Cain
7a9f29d305 Add initial asm!() support for hexagon
GPRs only
2020-06-16 08:58:13 -05:00
Michal Sudwoj
e18054d5c0 Added comment about static variables 2020-05-24 08:20:40 +02:00
Michal Sudwoj
5ec6b5eaee Fixed tests 2020-05-24 08:20:40 +02:00