Commit graph

1742 commits

Author SHA1 Message Date
bjorn3
8fd8b2d63c Only handle BinOp::Mul in codegen_i128::maybe_codegen_mul_checked 2025-01-09 16:04:25 +00:00
bjorn3
ec96e028a7 Slightly simplify maybe_codegen_checked 2025-01-09 15:28:50 +00:00
bjorn3
0335dc131f Make TimingGuard a little safer 2025-01-07 15:38:44 +00:00
bjorn3
4cc1c9036d Use -ffunction-sections by default again
Cranelift now uses the same section name for all subsections which
reduces the size overhead of -ffunction-sections.
2024-12-28 21:42:01 +00:00
bjorn3
446c582ce0 Sync from rust dd84b7d5ee 2024-12-28 13:32:14 +00:00
Scott McMurray
5e58dc1e96 Delete Rvalue::Len
Everything's moved to `PtrMetadata` instead.
2024-12-22 06:12:39 -08:00
bjorn3
1f66d7d47f Make DependencyList an IndexVec 2024-12-19 15:30:32 +00:00
bjorn3
c5291585b3 Sync from rust 4ba4ac612d 2024-12-19 15:13:56 +00:00
许杰友 Jieyou Xu (Joe)
47e42c8815 Rollup merge of #133702 - RalfJung:single-variant, r=oli-obk
Variants::Single: do not use invalid VariantIdx for uninhabited enums

~~Stacked on top of https://github.com/rust-lang/rust/pull/133681, only the last commit is new.~~

Currently, `Variants::Single` for an empty enum contains a `VariantIdx` of 0; looking that up in the enum variant list will ICE. That's quite confusing. So let's fix that by adding a new `Variants::Empty` case for types that have 0 variants.

try-job: i686-msvc
2024-12-19 16:48:07 +08:00
jyn
b046e32262 hook up tracing to cg_cranelift
this was easier than expected. here is an example of using RUSTC_LOG with a build of cranelift from rust-lang/rust:
```
$ RUSTC_LOG=rustc_codegen_cranelift cargo +stage1 b
   Compiling example v0.1.0 (/home/jyn/src/example)
 INFO rustc_codegen_cranelift codegen crate example
 INFO rustc_codegen_cranelift codegen crate example
    Finished `dev` profile [unoptimized + debuginfo] target(s) in 0.44s
```
2024-12-18 17:53:20 -05:00
bjorn3
9f50fa7e21 Ensure user trap code 0 is never used
Cranelift will return None from TrapCode::user(0).

Fixes rust-lang/rustc_codegen_cranelift#1548
2024-12-18 17:07:56 +00:00
acceptacross
3227f35177 chore: fix some typos
Signed-off-by: acceptacross <csqcqs@gmail.com>
2024-12-18 23:23:44 +08:00
bjorn3
076ae56bda Rustup to rustc 1.85.0-nightly (a4cb3c831 2024-12-17) 2024-12-18 15:12:35 +00:00
Ralf Jung
a6cf662f93 make no-variant types a dedicated Variants variant 2024-12-18 11:01:54 +01:00
Ralf Jung
2d32e43d38 Variants::Single: do not use invalid VariantIdx for uninhabited enums 2024-12-18 11:00:21 +01:00
Nicholas Nethercote
4dd8941d3f Re-export more rustc_span::symbol things from rustc_span.
`rustc_span::symbol` defines some things that are re-exported from
`rustc_span`, such as `Symbol` and `sym`. But it doesn't re-export some
closely related things such as `Ident` and `kw`. So you can do `use
rustc_span::{Symbol, sym}` but you have to do `use
rustc_span::symbol::{Ident, kw}`, which is inconsistent for no good
reason.

This commit re-exports `Ident`, `kw`, and `MacroRulesNormalizedIdent`,
and changes many `rustc_span::symbol::` qualifiers in `compiler/` to
`rustc_span::`. This is a 200+ net line of code reduction, mostly
because many files with two `use rustc_span` items can be reduced to
one.
2024-12-18 13:38:53 +11:00
Matthias Krüger
884dcee945 Rollup merge of #134251 - bjorn3:various_cleanups2, r=oli-obk
A bunch of cleanups (part 2)

Just like https://github.com/rust-lang/rust/pull/133567 these were all found while looking at the respective code, but are not blocking any other changes I want to make in the short term.
2024-12-14 03:54:35 +01:00
bjorn3
c99d4f0f51 Make dependency_formats an FxIndexMap rather than a list of tuples
It is treated as a map already. This is using FxIndexMap rather than
UnordMap because the latter doesn't provide an api to pick a single
value iff all values are equal, which each_linked_rlib depends on.
2024-12-13 11:29:15 +00:00
bjorn3
37b47f9542 Remove jobserver from Session
It is effectively a global resource and the jobserver::Client in Session
was a clone of GLOBAL_CLIENT anyway.
2024-12-13 10:21:22 +00:00
Ralf Jung
8d3a263c79 generalize 'forbidden feature' concept so that even (un)stable feature can be invalid to toggle
Also rename some things for extra clarity
2024-12-11 22:11:15 +01:00
Matthias Krüger
14f12919f6 Rollup merge of #133567 - bjorn3:various_cleanups, r=cjgillot
A bunch of cleanups

These are all extracted from a branch I have to get rid of driver queries. Most of the commits are not directly necessary for this, but were found in the process of implementing the removal of driver queries.

Previous PR: https://github.com/rust-lang/rust/pull/132410
2024-12-09 01:56:32 +01:00
Ben Kimock
4d01ca8ae9 Remove polymorphization 2024-12-06 16:42:09 -05:00
bjorn3
e7e58f4505 Move some timers around 2024-12-06 18:42:30 +00:00
bjorn3
e8ad19987d Merge commit '57845a397e' into sync_cg_clif-2024-12-06 2024-12-06 12:10:30 +00:00
Matthias Krüger
7174bcc8d6 Rollup merge of #133545 - clubby789:symbol-intern-lit, r=jieyouxu
Lint against Symbol::intern on a string literal

Disabled in tests where this doesn't make much sense
2024-12-03 17:27:06 +01:00
Matthias Krüger
c5acac93fd Rollup merge of #133395 - calebzulawski:simd_relaxed_fma, r=workingjubilee
Add simd_relaxed_fma intrinsic

Adds compiler support for https://github.com/rust-lang/portable-simd/issues/387#issuecomment-2337169786

r? `@workingjubilee`

cc `@RalfJung` is this kind of nondeterminism a problem for miri/opsem?
2024-12-03 07:48:33 +01:00
clubby789
a2e9aac905 Replace Symbol::intern calls with preinterned symbols 2024-11-28 15:45:27 +00:00
Guillaume Gomez
4161cefabe Rollup merge of #133422 - taiki-e:riscv-e-clobber-abi, r=Amanieu
Fix clobber_abi in RV32E and RV64E inline assembly

Currently clobber_abi in RV32E and RV64E inline assembly is implemented using InlineAsmClobberAbi::RiscV, but broken since x16-x31 cannot be used in RV32E and RV64E.

```
error: cannot use register `x16`: register can't be used with the `e` target feature
  --> <source>:42:14
   |
42 |     asm!("", clobber_abi("C"), options(nostack, nomem, preserves_flags));
   |              ^^^^^^^^^^^^^^^^

error: cannot use register `x17`: register can't be used with the `e` target feature
  --> <source>:42:14
   |
42 |     asm!("", clobber_abi("C"), options(nostack, nomem, preserves_flags));
   |              ^^^^^^^^^^^^^^^^

error: cannot use register `x28`: register can't be used with the `e` target feature
  --> <source>:42:14
   |
42 |     asm!("", clobber_abi("C"), options(nostack, nomem, preserves_flags));
   |              ^^^^^^^^^^^^^^^^

error: cannot use register `x29`: register can't be used with the `e` target feature
  --> <source>:42:14
   |
42 |     asm!("", clobber_abi("C"), options(nostack, nomem, preserves_flags));
   |              ^^^^^^^^^^^^^^^^

error: cannot use register `x30`: register can't be used with the `e` target feature
  --> <source>:42:14
   |
42 |     asm!("", clobber_abi("C"), options(nostack, nomem, preserves_flags));
   |              ^^^^^^^^^^^^^^^^

error: cannot use register `x31`: register can't be used with the `e` target feature
  --> <source>:42:14
   |
42 |     asm!("", clobber_abi("C"), options(nostack, nomem, preserves_flags));
   |              ^^^^^^^^^^^^^^^^
```

r? `@Amanieu`

`@rustbot` label O-riscv +A-inline-assembly
2024-11-28 12:06:01 +01:00
Matthias Krüger
e73d32190b Rollup merge of #131664 - taiki-e:s390x-asm-vreg-inout, r=Amanieu
Support input/output in vector registers of s390x inline assembly (under asm_experimental_reg feature)

This extends currently clobber-only vector registers (`vreg`) support to allow passing `#[repr(simd)]` types, floats (f32/f64/f128), and integers (i32/i64/i128) as input/output.

This is unstable and gated under new `#![feature(asm_experimental_reg)]` (tracking issue: https://github.com/rust-lang/rust/issues/133416). If the feature is not enabled, only clober is supported as before.

| Architecture | Register class | Target feature | Allowed types |
| ------------ | -------------- | -------------- | -------------- |
| s390x | `vreg` | `vector` | `i32`, `f32`, `i64`, `f64`, `i128`, `f128`, `i8x16`, `i16x8`, `i32x4`, `i64x2`, `f32x4`, `f64x2` |

This matches the list of types that are supported by the vector registers in LLVM:
https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td#L301-L313

In addition to `core::simd` types and floats listed above, custom `#[repr(simd)]` types of the same size and type are also allowed. All allowed types other than i32/f32/i64/f64/i128, and relevant target features are currently unstable.

Currently there is no SIMD type for s390x in `core::arch`, but this is tracked in https://github.com/rust-lang/rust/issues/130869.

cc https://github.com/rust-lang/rust/issues/130869 about vector facility support in s390x
cc https://github.com/rust-lang/rust/issues/125398 & https://github.com/rust-lang/rust/issues/116909 about f128 support in asm

`@rustbot` label +O-SystemZ +A-inline-assembly
2024-11-25 07:01:37 +01:00
Taiki Endo
b9e2bdd050 Fix clobber_abi in RV32E and RV64E inline assembly 2024-11-25 00:36:22 +09:00
Taiki Endo
1876e520e8 Make s390x non-clobber-only vector register support unstable 2024-11-24 21:42:22 +09:00
Caleb Zulawski
8f9d76550b Add simd_relaxed_fma intrinsic 2024-11-23 14:39:42 -05:00
lcnr
510943ab55 remove remaining references to Reveal 2024-11-23 13:52:56 +01:00
Ding Xiang Fei
329cd79cb4 reduce false positives of tail-expr-drop-order from consumed values
take 2

open up coroutines

tweak the wordings

the lint works up until 2021

We were missing one case, for ADTs, which was
causing `Result` to yield incorrect results.

only include field spans with significant types

deduplicate and eliminate field spans

switch to emit spans to impl Drops

Co-authored-by: Niko Matsakis <nikomat@amazon.com>

collect drops instead of taking liveness diff

apply some suggestions and add explantory notes

small fix on the cache

let the query recurse through coroutine

new suggestion format with extracted variable name

fine-tune the drop span and messages

bugfix on runtime borrows

tweak message wording

filter out ecosystem types earlier

apply suggestions

clippy

check lint level at session level

further restrict applicability of the lint

translate bid into nop for stable mir

detect cycle in type structure
2024-11-20 20:53:11 +08:00
lcnr
bf45e9f7f3 InterpCx store TypingEnv instead of a ParamEnv 2024-11-19 21:36:23 +01:00
lcnr
a4acd22dbb move fn is_item_raw to TypingEnv 2024-11-19 18:06:20 +01:00
bors
43181b4d75 Auto merge of #132460 - lcnr:questionable-uwu, r=compiler-errors
Use `TypingMode` throughout the compiler instead of `ParamEnv`

Hopefully the biggest single PR as part of https://github.com/rust-lang/types-team/issues/128.

## `infcx.typing_env` while defining opaque types

I don't know how'll be able to correctly handle opaque types when using something taking a `TypingEnv` while defining opaque types. To correctly handle the opaques we need to be able to pass in the current `opaque_type_storage` and return constraints, i.e. we need to use a proper canonical query. We should migrate all the queries used during HIR typeck and borrowck where this matters to proper canonical queries. This is

## `layout_of` and `Reveal::All`

We convert the `ParamEnv` to `Reveal::All` right at the start of the `layout_of` query, so I've changed callers of `layout_of` to already use a post analysis `TypingEnv` when encountering it.

ca87b535a0/compiler/rustc_ty_utils/src/layout.rs (L51)

## `Ty::is_[unpin|sized|whatever]`

I haven't migrated `fn is_item_raw` to use `TypingEnv`, will do so in a followup PR, this should significantly reduce the amount of `typing_env.param_env`. At some point there will probably be zero such uses as using the type system while ignoring the `typing_mode` is incorrect.

## `MirPhase` and phase-transitions

When inside of a MIR-body, we can mostly use its `MirPhase` to figure out the right `typing_mode`. This does not work during phase transitions, most notably when transitioning from `Analysis` to `Runtime`:

dae7ac133b/compiler/rustc_mir_transform/src/lib.rs (L606-L625)

All these passes still run with `MirPhase::Analysis`, but we should only use `Reveal::All` once we're run the `RevealAll` pass. This required me to manually construct the right `TypingEnv` in all these passes. Given that it feels somewhat easy to accidentally miss this going forward, I would maybe like to change `Body::phase` to an `Option` and replace it at the start of phase transitions. This then makes it clear that the MIR is currently in a weird state.

r? `@ghost`
2024-11-18 21:07:05 +00:00
lcnr
19a8eb2a7f use TypingEnv when no infcx is available
the behavior of the type system not only depends on the current
assumptions, but also the currentnphase of the compiler. This is
mostly necessary as we need to decide whether and how to reveal
opaque types. We track this via the `TypingMode`.
2024-11-18 10:38:56 +01:00
Ralf Jung
22b0e3c0d4 remove pointless cold_path impl in interpreter 2024-11-18 08:41:28 +01:00
Jiri Bobek
1a27566d20 Likely unlikely fix 2024-11-17 21:49:10 +01:00
bjorn3
995ccb684b Add a default implementation for CodegenBackend::link
As a side effect this should add raw-dylib support to cg_gcc as the
default ArchiveBuilderBuilder that is used implements
create_dll_import_lib. I haven't tested if the raw-dylib support
actually works however.
2024-11-09 20:42:56 +00:00
bjorn3
df983ce470 Merge commit '1fa693ca44' into sync_cg_clif-2024-11-09 2024-11-09 13:48:06 +00:00
Ralf Jung
ba6a38495f remove 'platform-intrinsic' ABI leftovers 2024-11-07 17:42:49 +01:00
bors
12677fd3d0 Auto merge of #132526 - bjorn3:sync_cg_clif-2024-11-02, r=bjorn3
Subtree sync for rustc_codegen_cranelift

The highlight this time is an update to Cranelift 0.113,

r? `@ghost`

`@rustbot` label +A-codegen +A-cranelift +T-compiler
2024-11-03 05:03:52 +00:00
Noratrieb
541c33ec41 Rename target triple to target tuple in many places in the compiler
This changes the naming to the new naming, used by `--print
target-tuple`.
It does not change all locations, but many.
2024-11-02 21:29:59 +01:00
bjorn3
e2a5108657 Merge commit '5b1246bb4b' into sync_cg_clif-2024-11-02 2024-11-02 14:53:30 +00:00
Mads Marquart
322d392d90 Move versioned LLVM target creation to rustc_codegen_ssa
The OS version depends on the deployment target environment variables,
the access of which we want to move to later in the compilation pipeline
that has access to more information, for example `env_depinfo`.
2024-11-01 17:07:18 +01:00
Jubilee Young
e3c154705c cg_clif: rustc_abi::Abi => BackendRepr 2024-10-29 15:01:01 -07:00
Jubilee Young
988f49d04f cg_clif: Rename LayoutS to LayoutData 2024-10-27 22:32:40 -07:00
Deadbeef
83f1121ebd Effects cleanup
- removed extra bits from predicates queries that are no longer needed in the new system
- removed the need for `non_erasable_generics` to take in tcx and DefId, removed unused arguments in callers
2024-10-26 10:19:07 +08:00