Commit graph

16 commits

Author SHA1 Message Date
Amanieu d'Antras
9ae5e95b28 Fix test 2020-08-28 18:53:09 +01:00
Amanieu d'Antras
178c1bbb5b Fix a typo in #75781 2020-08-26 10:49:15 +01:00
Josh Stone
a210a29303 Expand RISCV pseudo-instructions to match LLVM 11 2020-08-22 13:44:54 -07:00
Amanieu d'Antras
4fe4c3b7e3 Add regression test 2020-08-21 19:52:48 +01:00
Amanieu d'Antras
9198e8ad62 Work around LLVM issues with explicit register in inline asm
Fixes #74658
2020-08-03 10:43:09 +01:00
Vadim Petrochenkov
d3277b927a compiletest: Support ignoring tests requiring missing LLVM components 2020-08-02 20:35:24 +03:00
Brian Cain
7a9f29d305 Add initial asm!() support for hexagon
GPRs only
2020-06-16 08:58:13 -05:00
Michal Sudwoj
e18054d5c0 Added comment about static variables 2020-05-24 08:20:40 +02:00
Michal Sudwoj
5ec6b5eaee Fixed tests 2020-05-24 08:20:40 +02:00
Michal Sudwoj
baa801a929 Minor fixes, as requested in PR review 2020-05-24 08:20:40 +02:00
Michal Sudwoj
58fdc43e03 NVPTX support for new asm! 2020-05-24 08:20:35 +02:00
Amanieu d'Antras
46db0dfe8c Fix tests 2020-05-18 14:41:34 +01:00
Amanieu d'Antras
330bdf89b1 Disable asm tests on system llvm 2020-05-18 14:41:33 +01:00
Amanieu d'Antras
ddcdea45b6 The h modifier is only supported by reg_abcd 2020-05-18 14:41:33 +01:00
Amanieu d'Antras
7dfa486d4a Add support for high byte registers on x86 2020-05-18 14:41:32 +01:00
Amanieu d'Antras
8ab0f2d3c5 Add tests for asm! 2020-05-18 14:41:32 +01:00