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45 commits

Author SHA1 Message Date
Amanieu d'Antras
eb32c00216 Add features gates for experimental asm features 2021-11-07 01:23:53 +00:00
Josh Stone
e9f545b9a9 Update the minimum external LLVM to 12 2021-10-22 10:50:07 -07:00
Josh Stone
65150af1b4 Update the minimum external LLVM to 11 2021-10-22 09:22:18 -07:00
Hans Kratz
2a1fbb86eb test fix: aarch64 atomics are only outlined on Linux. 2021-10-15 06:19:08 +02:00
Alessandro Decina
8683d36042 Fix min LLVM version for bpf-types test 
Closes #89689
 2021-10-09 19:18:37 +11:00
Sebastian Pop
0f9f241aac [aarch64] add target feature outline-atomics 
Enable outline-atomics by default as enabled in clang by the following commit
https://reviews.llvm.org/rGc5e7e649d537067dec7111f3de1430d0fc8a4d11

Performance improves by several orders of magnitude when using the LSE instructions
instead of the ARMv8.0 compatible load/store exclusive instructions.

Tested on Graviton2 aarch64-linux with
x.py build && x.py install && x.py test
 2021-09-30 23:34:33 +00:00
Mara Bos
494c563f3b
Rollup merge of #88350 - programmerjake:add-ppc-cr-xer-clobbers, r=Amanieu 
add support for clobbering xer, cr, and cr[0-7] for asm! on OpenPower/PowerPC

Fixes #88315
 2021-09-01 09:23:26 +02:00
Jacob Lifshay
5802f60355 add support for clobbering xer, cr, and cr[0-7] for asm! on OpenPower/PowerPC 
Fixes #88315
 2021-08-25 22:08:27 -07:00
linux1
4a9ba65ca9 Feat: added explicit register tests; added prefix to check_reg asm string 2021-08-24 12:41:49 -04:00
linux1
96381d390d Fix: added necessary prefix 2021-08-23 21:53:23 -04:00
linux1
0c9e23c7ce Fix: appeased x.py test tidy --bless 2021-08-22 17:55:03 -04:00
linux1
eeb0b52bf8 Feat: further testing & support for i64 general register use 2021-08-22 17:55:03 -04:00
linux1
66e95b17ec Fix: moved #[no_mangle] 2021-08-22 17:55:03 -04:00
linux1
7095dfffc3 Refactor: added #[no_mangle] 2021-08-22 17:55:03 -04:00
linux1
5f5afba5fb Feat: added s390x reg-definitions, constraint codes, and tests 2021-08-22 17:55:03 -04:00
Simonas Kazlauskas
493fe8008b Re-Annotate the tests with needs-llvm-components 
Doesn't work though, because compiletest doesn't process ignores on a
per-revision manner.
 2021-06-24 23:13:08 +03:00
Alessandro Decina
ec0382e404 BPF: add assembly test 2021-05-29 21:53:06 +10:00
Dr. Chat
69acee3ffe Add asm!() support for PowerPC64 2021-05-13 22:31:47 -05:00
Amanieu d'Antras
5a229e0e20 Add tests for global_asm! 2021-05-13 22:31:58 +01:00
Dr. Chat
b1bb5d662c Add initial asm!() support for PowerPC 
This includes GPRs and FPRs only
 2021-05-11 19:04:16 -05:00
Amanieu d'Antras
b1bcff0731 Disallow the use of high byte registes as operands on x86_64 
They are still allowed on x86 though.

Fixes #83495
 2021-04-05 13:38:24 +01:00
Amanieu d'Antras
62e7331bd2 Mark inline asm tests as requiring LLVM 10.0.1 2021-03-25 20:21:58 +00:00
Nikita Popov
55f345f325 Support LLVM 12 in rustc 2021-02-28 10:19:44 +01:00
Johnathan Van Why
fd21eb18e9 32-bit ARM: Emit lr instead of r14 when specified as an asm! output register. 
On 32-bit ARM platforms, the register `r14` has the alias `lr`. When used as an output register in `asm!`, rustc canonicalizes the name to `r14`. LLVM only knows the register by the name `lr`, and rejects it. This changes rustc's LLVM code generation to output `lr` instead.
 2021-02-14 23:41:10 -08:00
Gus Caplan
d9f237caa6
Add wasm32 support to inline asm 2020-12-01 12:18:21 -06:00
Lzu Tao
79f477bb1f Add asm! support for mips64 2020-10-04 12:01:21 +00:00
Lzu Tao
6cb062dacf mips32: Add f64 hard-float support 
co-authored-by: Amanieu <amanieu@gmail.com>
 2020-10-04 03:35:52 +00:00
Lzu Tao
446f86e370 Remove useless stringify 2020-09-30 04:33:23 +00:00
Lzu Tao
9000710959 Add MIPS asm! support 
This patch also:
* Add soft-float supports: only f32
* zero-extend i8/i16 to i32 because MIPS only supports register-length
  arithmetic.
* Update table in asm! chapter in unstable book.
 2020-09-27 02:36:50 +00:00
Amanieu d'Antras
9ae5e95b28 Fix test 2020-08-28 18:53:09 +01:00
Amanieu d'Antras
178c1bbb5b Fix a typo in #75781 2020-08-26 10:49:15 +01:00
Josh Stone
a210a29303 Expand RISCV pseudo-instructions to match LLVM 11 2020-08-22 13:44:54 -07:00
Amanieu d'Antras
4fe4c3b7e3 Add regression test 2020-08-21 19:52:48 +01:00
Amanieu d'Antras
9198e8ad62 Work around LLVM issues with explicit register in inline asm 
Fixes #74658
 2020-08-03 10:43:09 +01:00
Vadim Petrochenkov
d3277b927a compiletest: Support ignoring tests requiring missing LLVM components 2020-08-02 20:35:24 +03:00
Brian Cain
7a9f29d305 Add initial asm!() support for hexagon 
GPRs only
 2020-06-16 08:58:13 -05:00
Michal Sudwoj
e18054d5c0 Added comment about static variables 2020-05-24 08:20:40 +02:00
Michal Sudwoj
5ec6b5eaee Fixed tests 2020-05-24 08:20:40 +02:00
Michal Sudwoj
baa801a929 Minor fixes, as requested in PR review 2020-05-24 08:20:40 +02:00
Michal Sudwoj
58fdc43e03 NVPTX support for new asm! 2020-05-24 08:20:35 +02:00
Amanieu d'Antras
46db0dfe8c Fix tests 2020-05-18 14:41:34 +01:00
Amanieu d'Antras
330bdf89b1 Disable asm tests on system llvm 2020-05-18 14:41:33 +01:00
Amanieu d'Antras
ddcdea45b6 The h modifier is only supported by reg_abcd 2020-05-18 14:41:33 +01:00
Amanieu d'Antras
7dfa486d4a Add support for high byte registers on x86 2020-05-18 14:41:32 +01:00
Amanieu d'Antras
8ab0f2d3c5 Add tests for asm! 2020-05-18 14:41:32 +01:00