a9b147259b
The amdgpu target uses vector types in various places. The vector types can be used on all architectures, there is no associated target feature that needs to be enabled. The largest vector type found in LLVM intrinsics is `v32i32` (`[32 x i32]`) for mfma intrinsics. Note that while this intrinsic is only supported on some architectures, the vector type itself is supported on all architectures.
79 lines
2.9 KiB
Rust
79 lines
2.9 KiB
Rust
// Using SIMD types in a program with foreign-function interfaces used to result in an ICE
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// (internal compiler error). Since this was fixed in #21233, it should be checked that
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// compilation of SIMD and FFI together should be successful on all the most common
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// architectures.
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// Note that this test does not check linking or binary execution.
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// See https://github.com/rust-lang/rust/pull/21233
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use run_make_support::{llvm_components_contain, rustc};
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fn main() {
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let mut targets = Vec::new();
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// arm-specific targets.
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if llvm_components_contain("arm") {
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targets.append(&mut vec![
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"arm-linux-androideabi".to_owned(),
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"arm-unknown-linux-gnueabihf".to_owned(),
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"arm-unknown-linux-gnueabi".to_owned(),
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]);
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}
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if llvm_components_contain("amdgpu") {
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targets.push("amdgcn-amd-amdhsa".to_owned());
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}
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let mut x86_archs = Vec::new();
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if llvm_components_contain("x86") {
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x86_archs.append(&mut vec!["i686", "x86_64"]);
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}
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// Linux has all x86 targets, plus aarch64 and mips.
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let mut extra_targets = x86_archs.clone();
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if llvm_components_contain("aarch64") {
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extra_targets.push("aarch64");
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}
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if llvm_components_contain("mips") {
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extra_targets.append(&mut vec!["mips", "mipsel"]);
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}
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for target in extra_targets {
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let linux = format!("{target}-unknown-linux-gnu");
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targets.push(linux);
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}
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// Windows and Darwin (OSX) only receive x86 targets.
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let extra_targets = x86_archs.clone();
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for target in extra_targets {
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let windows = format!("{target}-pc-windows-gnu");
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let darwin = format!("{target}-apple-darwin");
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targets.push(windows);
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targets.push(darwin);
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}
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for target in targets {
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// compile the rust file to the given target, but only to asm and IR
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// form, to avoid having to have an appropriate linker.
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//
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// we need some features because the integer SIMD instructions are not
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// enabled by-default for i686 and ARM; these features will be invalid
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// on some platforms, but LLVM just prints a warning so that's fine for
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// now.
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let mut cmd = rustc();
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cmd.target(&target).emit("llvm-ir,asm").input("simd.rs");
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let target_feature = if target.starts_with("i686") || target.starts_with("x86") {
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"+sse2"
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} else if target.starts_with("arm") || target.starts_with("aarch64") {
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"-soft-float,+neon"
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} else if target.starts_with("mips") {
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"+msa,+fp64"
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} else if target.starts_with("amdgcn") {
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cmd.arg("-Ctarget-cpu=gfx900");
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""
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} else {
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panic!("missing target_feature case for {target}");
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};
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if !target_feature.is_empty() {
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cmd.arg(format!("-Ctarget-feature={target_feature}"));
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}
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cmd.arg(&format!("-Cextra-filename=-{target}")).run();
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}
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}
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