Support RISC-V unaligned-scalar-mem target feature This adds `unaligned-scalar-mem` as an allowed RISC-V target feature. Some RISC-V cores support unaligned access to memory without trapping. On such cores, the compiler could significantly improve code-size and performance when using functions like core::ptr::read_unaligned<u32> by emitting a single load or store instruction with an unaligned address, rather than a long sequence of byte load/store/bitmanip instructions. Enabling the `unaligned-scalar-mem` target feature allows LLVM to do this optimization. Fixes #110883 |
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| back | ||
| coverageinfo | ||
| debuginfo | ||
| mir | ||
| traits | ||
| base.rs | ||
| codegen_attrs.rs | ||
| common.rs | ||
| errors.rs | ||
| glue.rs | ||
| lib.rs | ||
| meth.rs | ||
| mono_item.rs | ||
| target_features.rs | ||