Tsukasa OI 5ebdec5ac2 rustc_codegen_llvm: Adjust RISC-V inline assembly's clobber list ... Despite that the `fflags` register (representing floating point exception flags) is stated as a flag register in the reference, it's not in the default clobber list of the RISC-V inline assembly and it would be better to fix it.		2025-09-15 02:16:34 +00:00
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aarch64-clobbers.rs
avr-clobbers.rs
bpf-clobbers.rs
critical.rs
csky-clobbers.rs
foo.s
global_asm.rs
global_asm_include.rs
global_asm_x2.rs
goto.rs
hexagon-clobbers.rs
may_unwind.rs
maybe-uninit.rs
msp430-clobbers.rs
multiple-options.rs
options.rs
powerpc-clobbers.rs
riscv-clobbers.rs	rustc_codegen_llvm: Adjust RISC-V inline assembly's clobber list	2025-09-15 02:16:34 +00:00
s390x-clobbers.rs
sanitize-llvm.rs
sparc-clobbers.rs
x86-clobber_abi.rs
x86-clobbers.rs
x86-target-clobbers.rs