Stabilize `sha512`, `sm3` and `sm4` for x86 This PR stabilizes the feature flag `sha512_sm_x86` (tracking issue rust-lang/rust#126624). # Public API The 3 `x86` target features `sha512`, `sm3` and `sm4`, and the associated intrinsics in stdarch. These target features are very specialized, and are only used to signal the presence of the corresponding CPU instruction. They don't have any nontrivial interaction with the ABI (contrary to something like AVX), and serve the only purpose of enabling 10 stdarch intrinsics, all of which have been implemented and propagated to rustc via a stdarch submodule update. Also, these were added in LLVM17, and as the minimum LLVM required for rustc is LLVM19, we are safe in that front too! # Associated PRs - rust-lang/rust#126704 - rust-lang/stdarch#1592 - rust-lang/stdarch#1790 - rust-lang/rust#140389 (stdarch submodule update) - rust-lang/stdarch#1796 (stabilizing the runtime detection and intrinsics) - rust-lang/rust#141964 (stdarch submodule update for the stabilization of the runtime detection and intrinsics) As all of the required tasks have been done (adding the target features to rustc, implementing their runtime detection in std_detect and implementing the associated intrinsics in core_arch), these target features can be stabilized now. cc `@rust-lang/lang` cc `@rust-lang/libs-api` for the intrinsics and runtime detection I don't think anyone else worked on this feature, so no one else to ping, maybe cc `@Amanieu.` I will send the reference pr soon. |
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This is the main source code repository for Rust. It contains the compiler, standard library, and documentation.
Why Rust?
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Performance: Fast and memory-efficient, suitable for critical services, embedded devices, and easily integrated with other languages.
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Reliability: Our rich type system and ownership model ensure memory and thread safety, reducing bugs at compile-time.
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