Scott McMurray 05a665f21a Lower intrinsics::offset to mir::BinOp::Offset ... They're semantically the same, so this means the backends don't need to handle the intrinsic and means fewer MIR basic blocks in pointer arithmetic code.		2023-04-25 19:23:45 -07:00
..
abi	Fix rustc_index imports outside the compiler	2023-04-24 13:53:37 +00:00
debuginfo	Merge commit 'dec0daa8f6' into sync_cg_clif-2023-03-15	2023-03-15 14:41:48 +00:00
driver	Merge commit 'dec0daa8f6' into sync_cg_clif-2023-03-15	2023-03-15 14:41:48 +00:00
intrinsics	Lower intrinsics::offset to mir::BinOp::Offset	2023-04-25 19:23:45 -07:00
optimize	Merge commit '598f090956' into sync_cg_clif-2023-01-24	2023-01-24 18:56:42 +01:00
allocator.rs	Revert "Remove #[alloc_error_handler] from the compiler and library"	2023-04-25 00:08:35 +02:00
analyze.rs	Split {Idx, IndexVec, IndexSlice} into their own modules	2023-04-24 13:53:35 +00:00
archive.rs	Rewrite LLVM's archive writer in Rust	2022-11-26 19:35:32 +00:00
base.rs	Split {Idx, IndexVec, IndexSlice} into their own modules	2023-04-24 13:53:35 +00:00
cast.rs	Merge commit 'dec0daa8f6' into sync_cg_clif-2023-03-15	2023-03-15 14:41:48 +00:00
codegen_i128.rs	Merge commit 'dec0daa8f6' into sync_cg_clif-2023-03-15	2023-03-15 14:41:48 +00:00
common.rs	Split {Idx, IndexVec, IndexSlice} into their own modules	2023-04-24 13:53:35 +00:00
compiler_builtins.rs	Merge commit 'dec0daa8f6' into sync_cg_clif-2023-03-15	2023-03-15 14:41:48 +00:00
concurrency_limiter.rs	Merge commit 'dec0daa8f6' into sync_cg_clif-2023-03-15	2023-03-15 14:41:48 +00:00
config.rs	Merge commit '7d53619064' into sync_cg_clif-2023-02-09	2023-02-09 12:38:16 +01:00
constant.rs	Remove WithOptconstParam.	2023-04-20 17:48:32 +00:00
discriminant.rs	Remove from cranelift too.	2023-04-14 16:26:11 +00:00
global_asm.rs	Merge commit 'dec0daa8f6' into sync_cg_clif-2023-03-15	2023-03-15 14:41:48 +00:00
inline_asm.rs	Merge commit 'dec0daa8f6' into sync_cg_clif-2023-03-15	2023-03-15 14:41:48 +00:00
lib.rs	Split {Idx, IndexVec, IndexSlice} into their own modules	2023-04-24 13:53:35 +00:00
linkage.rs	Sync rustc_codegen_cranelift 'ddd4ce2553'	2021-04-30 14:49:58 +02:00
main_shim.rs	Merge commit 'dec0daa8f6' into sync_cg_clif-2023-03-15	2023-03-15 14:41:48 +00:00
num.rs	Auto merge of #108282 - cjgillot:mir-checked-sh, r=tmiasko	2023-03-15 21:31:06 +00:00
pointer.rs	Merge commit 'dec0daa8f6' into sync_cg_clif-2023-03-15	2023-03-15 14:41:48 +00:00
pretty_clif.rs	Merge commit 'dec0daa8f6' into sync_cg_clif-2023-03-15	2023-03-15 14:41:48 +00:00
toolchain.rs	Merge commit 'e9d1a0a7b0' into sync_cg_clif-2022-08-24	2022-08-24 18:40:58 +02:00
trap.rs	Merge commit 'e9d1a0a7b0' into sync_cg_clif-2022-08-24	2022-08-24 18:40:58 +02:00
unsize.rs	Move mir::Field → abi::FieldIdx	2023-03-28 22:22:37 -07:00
value_and_place.rs	Update ty::VariantDef to use IndexVec<FieldIdx, FieldDef>	2023-03-30 09:23:40 -07:00
vtable.rs	Move mir::Field → abi::FieldIdx	2023-03-28 22:22:37 -07:00