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back
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Mark all optimize methods and the codegen method as safe
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2025-05-28 20:55:00 +00:00 |
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builder
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add and use generic get_const_int function
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2025-06-16 14:23:06 -07:00 |
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coverageinfo
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Remove methods from StaticCodegenMethods that are not called in cg_ssa itself
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2025-05-28 20:55:00 +00:00 |
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debuginfo
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Change tag_field to FieldIdx in Variants::Multiple
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2025-06-03 23:42:21 -07:00 |
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llvm
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Use LLVMIntrinsicGetDeclaration to completely remove the hardcoded intrinsics list
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2025-06-15 22:15:16 +05:30 |
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abi.rs
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Fix RISC-V C function ABI when passing/returning structs containing floats
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2025-06-16 10:14:07 +01:00 |
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allocator.rs
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Change __rust_no_alloc_shim_is_unstable to be a function
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2025-06-16 10:54:07 -07:00 |
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asm.rs
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Add f16 inline asm support for LoongArch
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2025-06-14 09:39:30 +08:00 |
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attributes.rs
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centralize -Zmin-function-alignment logic
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2025-06-22 00:47:10 +02:00 |
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base.rs
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Make predefine methods take &mut self
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2025-05-28 20:55:00 +00:00 |
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builder.rs
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Correctly account for different address spaces in LLVM intrinsic invocations
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2025-06-15 22:45:26 +05:30 |
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callee.rs
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don't depend on rustc_attr_parsing if rustc_data_structures will do
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2025-05-09 23:16:55 +02:00 |
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common.rs
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make more CodegenCx function generic
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2025-06-16 10:36:15 -07:00 |
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consts.rs
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store target.min_global_align as an Align
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2025-06-07 22:06:42 +02:00 |
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context.rs
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Rollup merge of #142588 - ZuseZ4:generic-ctx-imprv, r=oli-obk
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2025-06-17 23:19:36 +02:00 |
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declare.rs
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Make allocator shim creation mostly use safe code
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2025-02-24 15:11:29 +00:00 |
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errors.rs
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move -Ctarget-feature handling into shared code
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2025-06-19 09:44:01 +09:00 |
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intrinsic.rs
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Correctly account for different address spaces in LLVM intrinsic invocations
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2025-06-15 22:45:26 +05:30 |
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lib.rs
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Rollup merge of #141769 - bjorn3:codegen_metadata_module_rework, r=workingjubilee,saethlin
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2025-06-15 23:51:54 +02:00 |
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llvm_util.rs
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various minor target feature cleanups
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2025-06-19 10:50:03 +09:00 |
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mono_item.rs
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Make predefine methods take &mut self
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2025-05-28 20:55:00 +00:00 |
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type_.rs
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Use LLVMIntrinsicGetDeclaration to completely remove the hardcoded intrinsics list
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2025-06-15 22:15:16 +05:30 |
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type_of.rs
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rename BackendRepr::Vector → SimdVector
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2025-02-28 17:17:45 +01:00 |
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va_arg.rs
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implement va_arg for powerpc
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2025-06-01 00:51:01 +02:00 |
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value.rs
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Add warn(unreachable_pub) to rustc_codegen_llvm.
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2024-08-16 08:46:57 +10:00 |
