Fix handling of reserved registers for ARM inline asm
`r6` is now disallowed as an operand since LLVM sometimes uses it as a base pointer.
The check against using the frame pointer as an operand now takes the platform into account and will block either `r7` or `r11` as appropriate.
Fixes#73450
cc @cbiffle
The codegen crate contains the code to convert from MIR into LLVM IR,
and then from LLVM IR into machine code. In general it contains code
that runs towards the end of the compilation process.
For more information about how codegen works, see the rustc dev guide.