These are currently broken because the order of elements inside vectors is reversed on big-endian systems: the ARM ABI requires that element 0 is located at the highest address of the vector type. However LLVM intrinsics expect element 0 to be located at the lowest address. See https://llvm.org/docs/BigEndianNEON.html and `arm_neon.h` in Clang for more details. Although this is a breaking change, this is acceptable for 2 reasons: - big endian ARM targets are only tier 3. - it is preferable to stop existing code from compiling than to let it run and produce incorrect results. |
||
|---|---|---|
| .. | ||
| .github/workflows | ||
| ci | ||
| crates | ||
| examples | ||
| intrinsics_data | ||
| .cirrus.yml | ||
| .gitignore | ||
| .gitmodules | ||
| Cargo.toml | ||
| CONTRIBUTING.md | ||
| LICENSE-APACHE | ||
| LICENSE-MIT | ||
| README.md | ||
| rustfmt.toml | ||
| triagebot.toml | ||
| vendor.yml | ||
stdarch - Rust's standard library SIMD components
Crates
This repository contains two main crates:
-
core_archimplementscore::arch- Rust's core library architecture-specific intrinsics, and -
std_detectimplementsstd::detect- Rust's standard library run-time CPU feature detection.
The std::simd component now lives in the
packed_simd_2 crate.