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rust/src/librustc_codegen_llvm
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bors e91bf6c881 Auto merge of #69478 - avr-rust:avr-support-upstream, r=jonas-schievink 
Enable AVR as a Tier 3 target upstream

Tracking issue: #44052.

Things intentionally left out of the initial upstream:

* The `target_cpu` flag

I have made the cleanup suggestions by @jplatte and @jplatte in 043550d9db.

Anybody feel free to give the branch a test and see how it fares, or make suggestions on the code patch itself.
2020-06-12 01:28:37 +00:00
..
back Handle assembler warnings properly 2020-06-09 15:01:02 +01:00
debuginfo Add -Z profile-emit=<path> for Gcov gcda output. 2020-05-27 14:10:40 -04:00
llvm Auto merge of #69478 - avr-rust:avr-support-upstream, r=jonas-schievink 2020-06-12 01:28:37 +00:00
abi.rs [AVR] Add AVR platform support 2020-06-09 17:34:07 +12:00
allocator.rs Add Option to Force Unwind Tables 2020-05-04 12:08:35 +01:00
asm.rs Rollup merge of #72625 - Amanieu:asm-srcloc, r=petrochenkov 2020-05-30 23:08:44 +02:00
attributes.rs Rollup merge of #72309 - petrochenkov:linkunspec, r=matthewjasper 2020-05-22 08:54:53 +02:00
base.rs [self-profling] Record the cgu name when doing codegen for a module 2020-05-20 07:40:42 -04:00
build.rs Remove licenses 2018-12-25 21:08:33 -07:00
builder.rs Consistently use LLVM lifetime markers during codegen 2020-05-14 15:23:24 +02:00
callee.rs Modify as_local_hir_id to accept a LocalDefId instead of a DefId 2020-04-23 23:14:07 +01:00
Cargo.toml Make things build again 2020-06-02 20:38:24 +03:00
common.rs Make TLS accesses explicit in MIR 2020-05-30 12:59:05 +02:00
consts.rs Add a convenience function for testing whether a static is #[thread_local] 2020-04-30 17:06:11 +02:00
context.rs Use OnceCell instead of Once 2020-05-22 13:31:02 -07:00
declare.rs rustc -> rustc_middle part 3 (rustfmt) 2020-03-30 07:19:55 +02:00
intrinsic.rs update codegen of discriminant_value 2020-05-19 10:25:13 +02:00
lib.rs llvm: Expose tiny code model to users 2020-05-20 23:10:48 +03:00
llvm_util.rs Enable ARM TME (Transactional Memory Extensions) 2020-05-21 23:20:57 +02:00
metadata.rs rustc -> rustc_middle part 2 2020-03-30 07:16:56 +02:00
mono_item.rs fix abuses of tykind::err 2020-04-07 22:47:25 -05:00
README.md Fix broken link in README 2020-03-30 10:09:51 -04:00
type_.rs nix rustc_target::abi::* reexport in ty::layout 2020-04-02 13:40:43 +02:00
type_of.rs rustc_target::abi: add Primitive variant to FieldsShape. 2020-04-16 15:15:51 +00:00
va_arg.rs nix rustc_target::abi::* reexport in ty::layout 2020-04-02 13:40:43 +02:00
value.rs Format the world 2019-12-22 17:42:47 -05:00

README.md

The codegen crate contains the code to convert from MIR into LLVM IR, and then from LLVM IR into machine code. In general it contains code that runs towards the end of the compilation process.

For more information about how codegen works, see the rustc dev guide.