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Fix typos in core_arch documentation

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Nathan Wiebe Neufeldt 2019-07-22 13:13:54 -04:00 • committed by gnzlbg
parent 03f389ff6d
commit 0010f5bb4b
3 changed files with 868 additions and 868 deletions
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1730
library/stdarch/crates/core_arch/src/mips/msa.rs
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2
library/stdarch/crates/core_arch/src/x86/avx.rs
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@ -1913,7 +1913,7 @@ pub unsafe fn _mm256_moveldup_ps(a: __m256) -> __m256 {
}
/// Duplicate even-indexed double-precision (64-bit) floating-point elements
/// from "a", and returns the results.
/// from `a`, and returns the results.
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_movedup_pd)
#[inline]

4
library/stdarch/crates/core_arch/src/x86/sse2.rs
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@ -2315,7 +2315,7 @@ pub unsafe fn _mm_ucomineq_sd(a: __m128d, b: __m128d) -> i32 {
ucomineqsd(a, b)
}
/// Converts packed double-precision (64-bit) floating-point elements in "a" to
/// Converts packed double-precision (64-bit) floating-point elements in `a` to
/// packed single-precision (32-bit) floating-point elements
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cvtpd_ps)
@ -2378,7 +2378,7 @@ pub unsafe fn _mm_cvtsd_ss(a: __m128, b: __m128d) -> __m128 {
cvtsd2ss(a, b)
}
/// Returns the lower double-precision (64-bit) floating-point element of "a".
/// Returns the lower double-precision (64-bit) floating-point element of `a`.
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cvtsd_f64)
#[inline]