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Fix some Arm instruction assertion tests

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This commit is contained in:
Adam Gemmell 2025-12-16 11:24:11 +00:00
parent af3604e84e
commit 2c15ae530f
4 changed files with 11 additions and 11 deletions
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10
library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs
View file

@ -9487,7 +9487,7 @@ pub fn vdivq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t {
#[target_feature(enable = "neon,fp16")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg(not(target_arch = "arm64ec"))]
#[cfg_attr(test, assert_instr(nop))]
#[cfg_attr(test, assert_instr(fdiv))]
pub fn vdivh_f16(a: f16, b: f16) -> f16 {
a / b
}
@ -14829,7 +14829,7 @@ pub fn vmuld_lane_f64<const LANE: i32>(a: f64, b: float64x1_t) -> f64 {
#[target_feature(enable = "neon,fp16")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg(not(target_arch = "arm64ec"))]
#[cfg_attr(test, assert_instr(nop))]
#[cfg_attr(test, assert_instr(fmul))]
pub fn vmulh_f16(a: f16, b: f16) -> f16 {
a * b
}
@ -26719,7 +26719,7 @@ pub fn vsubq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t {
#[inline]
#[target_feature(enable = "neon")]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(nop))]
#[cfg_attr(test, assert_instr(sub))]
pub fn vsubd_s64(a: i64, b: i64) -> i64 {
a.wrapping_sub(b)
}
@ -26728,7 +26728,7 @@ pub fn vsubd_s64(a: i64, b: i64) -> i64 {
#[inline]
#[target_feature(enable = "neon")]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(nop))]
#[cfg_attr(test, assert_instr(sub))]
pub fn vsubd_u64(a: u64, b: u64) -> u64 {
a.wrapping_sub(b)
}
@ -26738,7 +26738,7 @@ pub fn vsubd_u64(a: u64, b: u64) -> u64 {
#[target_feature(enable = "neon,fp16")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg(not(target_arch = "arm64ec"))]
#[cfg_attr(test, assert_instr(nop))]
#[cfg_attr(test, assert_instr(fsub))]
pub fn vsubh_f16(a: f16, b: f16) -> f16 {
a - b
}

2
library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs
View file

@ -8310,7 +8310,7 @@ pub fn vcreate_p64(a: u64) -> poly64x1_t {
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
# [cfg_attr (all (test , target_arch = "arm") , assert_instr (vcvt . f16 . f32))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vcvt))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
assert_instr(fcvtn)

8
library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml
View file

@ -5669,7 +5669,7 @@ intrinsics:
- *neon-fp16
- *neon-unstable-f16
- *target-not-arm64ec
assert_instr: [nop]
assert_instr: [fdiv]
safety: safe
types:
- [f16, 'h']
@ -5694,7 +5694,7 @@ intrinsics:
arguments: ["a: {type[1]}", "b: {type[1]}"]
return_type: "{type[1]}"
attr: [*neon-stable]
assert_instr: [nop]
assert_instr: [sub]
safety: safe
types:
- ['d_s64', 'i64']
@ -5710,7 +5710,7 @@ intrinsics:
- *neon-fp16
- *neon-unstable-f16
- *target-not-arm64ec
assert_instr: [nop]
assert_instr: [fsub]
safety: safe
types:
- ['h_f16', 'f16']
@ -11271,7 +11271,7 @@ intrinsics:
- *neon-fp16
- *neon-unstable-f16
- *target-not-arm64ec
assert_instr: [nop]
assert_instr: [fmul]
safety: safe
types:
- [f16, 'h']

2
library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml
View file

@ -10732,7 +10732,7 @@ intrinsics:
return_type: "{neon_type[1]}"
attr:
- *neon-v7
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt.f16.f32]]}]]
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcvtn]]}]]
- *arm-fp16
- *neon-unstable-f16