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convert _mm256_maskz_alignr_epi8 to const generics

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Rémy Rakic 2021-03-05 01:08:32 +01:00 • committed by Amanieu d'Antras
parent 9098b2c1aa
commit dfacaf7f3e
1 changed files with 11 additions and 11 deletions
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22
library/stdarch/crates/core_arch/src/x86/avx512bw.rs
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@ -9110,15 +9110,15 @@ pub unsafe fn _mm256_mask_alignr_epi8<const IMM8: i32>(
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_maskz_alignr_epi8&expand=262)
#[inline]
#[target_feature(enable = "avx512bw,avx512vl")]
#[rustc_args_required_const(3)]
#[cfg_attr(test, assert_instr(vpalignr, imm8 = 5))]
pub unsafe fn _mm256_maskz_alignr_epi8(k: __mmask32, a: __m256i, b: __m256i, imm8: i32) -> __m256i {
macro_rules! call {
($imm8:expr) => {
_mm256_alignr_epi8(a, b, $imm8)
};
}
let r = constify_imm8_sae!(imm8, call);
#[rustc_legacy_const_generics(3)]
#[cfg_attr(test, assert_instr(vpalignr, IMM8 = 5))]
pub unsafe fn _mm256_maskz_alignr_epi8<const IMM8: i32>(
k: __mmask32,
a: __m256i,
b: __m256i,
) -> __m256i {
static_assert_imm8!(IMM8);
let r = _mm256_alignr_epi8(a, b, IMM8);
transmute(simd_select_bitmask(
k,
r.as_i8x32(),
@ -17767,9 +17767,9 @@ mod tests {
1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0,
);
let b = _mm256_set1_epi8(1);
let r = _mm256_maskz_alignr_epi8(0, a, b, 14);
let r = _mm256_maskz_alignr_epi8::<14>(0, a, b);
assert_eq_m256i(r, _mm256_setzero_si256());
let r = _mm256_maskz_alignr_epi8(0b11111111_11111111_11111111_11111111, a, b, 14);
let r = _mm256_maskz_alignr_epi8::<14>(0b11111111_11111111_11111111_11111111, a, b);
#[rustfmt::skip]
let e = _mm256_set_epi8(
0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 1,