sayantn
1f779b7b40
Added runtime detection
...
Expanded the cache size to 93 (we will need this in near future)
Fixed detection of VAES, GFNI and VPCLMULQDQ
Could not test with `cupid` because they do not support these yet
2024-06-23 10:36:46 +02:00
Tobias Decking
2fd58a7ac7
Use generic simd for avx512 popcnt
2024-06-23 10:14:32 +02:00
Ralf Jung
90d47e9c71
set asm attributes
2024-06-21 16:59:03 +02:00
Ralf Jung
5982c0838a
fix test_mm512_stream_ps test
2024-06-21 16:59:03 +02:00
Ralf Jung
5c0744a3e5
non-temporal stores: use inline assembly
2024-06-21 16:59:03 +02:00
Tobias Decking
36852a1264
Update avx2.rs
2024-06-21 14:52:17 +02:00
Ralf Jung
5e7dada0eb
addcarryx: use pointers of the right type
2024-06-21 11:59:57 +02:00
sayantn
8ee3cc779a
AVX512DQ: Fixes (Corrected some typos in tests, Removed intrinsics list as everything has been implemented)
2024-06-18 19:13:13 +02:00
sayantn
b21e02ad83
AVX512DQ: Fixes (Adding SSE target_feature for i586)
2024-06-18 19:13:13 +02:00
sayantn
1f4034ba50
AVX512DQ Part 7: FP-Class
2024-06-18 19:13:13 +02:00
sayantn
c0a49d908b
AVX512DQ Part 6: Reduce
2024-06-18 19:13:13 +02:00
sayantn
177b75bde5
AVX512DQ Part 6: Reduce
2024-06-18 19:13:13 +02:00
sayantn
52f8b0c1a9
AVX512DQ Part 5: Range. Fixed intrinsic verification.
2024-06-18 19:13:13 +02:00
sayantn
c052982434
AVX512DQ Part 4: Mask Registers and Multiply Low
2024-06-18 19:13:13 +02:00
sayantn
54ef05ac65
AVX512DQ : Fix errors in Part 2
2024-06-18 19:13:13 +02:00
sayantn
5d2e19f5b6
AVX512DQ Part 3: Convert Intrinsics
2024-06-18 19:13:13 +02:00
sayantn
3281ecd0da
AVX512DQ : Fix Instructions
2024-06-18 19:13:13 +02:00
sayantn
a0efee80a1
AVX512DQ : Fix
2024-06-18 19:13:13 +02:00
sayantn
dbb53389db
AVX512DQ : Fix : Added to mod.rs
2024-06-18 19:13:13 +02:00
sayantn
011c102479
AVX512DQ : Fix : Added to mod.rs
2024-06-18 19:13:13 +02:00
sayantn
9af0ddafac
AVX512DQ Part 2: Broadcast, Extract, Insert
2024-06-18 19:13:13 +02:00
sayantn
fd6d97c21e
AVX512DQ Part 1: Logical Operations (and, andn, or, xor) - tests and doc
2024-06-18 19:13:13 +02:00
sayantn
d316154255
AVX512DQ Part 1: Logical Operations (and, andn, or, xor)
2024-06-18 19:13:13 +02:00
sayantn
cc2c29113f
AVX512DQ Part 0: Intrinsics List
2024-06-18 19:13:13 +02:00
Tobias Decking
f0f309bc52
Replace addsub variations
2024-06-17 00:39:37 +02:00
Tobias Decking
3e95b6133a
Fix SSE2 sqrt
2024-06-17 00:39:37 +02:00
Tobias Decking
628831b7e1
Fix SSE sqrt
2024-06-17 00:39:37 +02:00
Tobias Decking
4831241378
Parenthesis
2024-06-17 00:39:37 +02:00
Tobias Decking
ef989eff75
Fix compiler errors
2024-06-17 00:39:37 +02:00
Tobias Decking
746b490131
Update avx.rs
2024-06-17 00:39:37 +02:00
Tobias Decking
13da9da323
Update sse2.rs
2024-06-17 00:39:37 +02:00
Tobias Decking
2d30424922
Update sse.rs
2024-06-17 00:39:37 +02:00
Tobias Decking
b683da6b0b
Update fma.rs
2024-06-17 00:39:37 +02:00
Luca Barbato
61fb419a9b
Use longer associated types in the Altivec traits
2024-06-11 15:00:39 +02:00
sayantn
511bbff3b2
Update avx.rs
2024-06-11 00:18:28 +02:00
sayantn
1ccc7dbd0d
Fixed _mm256_cvtsd_f64
...
This intrinsic should have `target_feature` AVX, (according to Intel Intrinsics Guide) but had AVX2
2024-06-11 00:18:28 +02:00
bjorn3
292c0ecffd
Fix duplicated argument name in extern block
...
While rustc accepts it just fine due to what is arguably a bug, this
duplication does become an issue when generating functions from the llvm
intrinsic declarations while reusing the argument names.
2024-06-07 20:42:46 +02:00
Amanieu d'Antras
860145884d
Ignore int3 instructions when counting instructions in tests
...
These are generated as padding and are not actually part of the
function.
2024-06-07 19:18:13 +02:00
Olasunkanmi Olayinka
da09b47285
feat: stabilization for stdarch_aarch64_crc32
2024-05-14 15:52:07 +02:00
Luca Barbato
adb2db7471
Add vec_insert and vec_extract
2024-05-13 19:08:20 +02:00
Daniel Paoliello
130bc86694
Remove libc dependency on Windows by using Win32 to get env vars
2024-05-07 20:50:51 +02:00
Luca Barbato
0a5325a16c
Add vec_orc
2024-05-06 16:02:08 +02:00
Luca Barbato
f91e5fd6b2
Simplify vec_andc implementation
2024-05-06 16:02:08 +02:00
Luca Barbato
509d5efe2b
Silence unexpected-cfgs
2024-05-06 16:02:08 +02:00
Luca Barbato
4815a9efaf
Add vec_mul
2024-04-28 20:56:17 +02:00
Eduardo Sánchez Muñoz
c5f9c14154
Remove #![feature(inline_const)]
...
The feature has been stabilized
2024-04-28 20:33:41 +02:00
Eduardo Sánchez Muñoz
95ce20e6f2
Add #[cfg_attr(miri, ignore)] to tests of intrinsics that cannot be supported by Miri
2024-04-28 20:33:41 +02:00
Eduardo Sánchez Muñoz
ff7e6c7ac6
Implement ARM __ssat and __usat functions
2024-04-23 15:58:46 +02:00
Ben Kimock
2a21235f7a
Don't depend on libc for cfg(windows)
2024-04-22 01:24:03 +02:00
Daniel Paoliello
613efc499c
Enable testing for AArch64 Windows
2024-04-19 17:21:08 +02:00
