Commit graph

579 commits

Author SHA1 Message Date
whitequark
5b0700ef31 Add a min_atomic_width target option, like max_atomic_width.
Rationale: some ISAs, e.g. OR1K, do not have atomic instructions
for byte and halfword access, and at the same time do not have
a fixed endianness, which makes it unreasonable to implement these
through word-sized atomic accesses.
2016-12-24 02:17:45 +00:00
bors
99913c5ead Auto merge of #38401 - redox-os:redox_cross, r=brson
Redox Cross Compilation

I will admit - there are things here that I wish I did not have to do. This completes the ability to create a cross compiler from the rust repository for `x86_64-unknown-redox`. I will document this PR with inline comments explaining some things.

[View this gist to see how a cross compiler is built](https://gist.github.com/jackpot51/6680ad973986e84d69c79854249f2b7e)

Prior discussion of a smaller change is here: https://github.com/rust-lang/rust/pull/38366
2016-12-23 09:09:26 +00:00
Jeremy Soller
c59bb4979c Correct target_family mess 2016-12-22 22:20:47 -07:00
Jeremy Soller
1eb6c44b1c Remove start functions, use newlib instead of openlibm + ralloc 2016-12-22 16:13:14 -07:00
Jeremy Soller
e7b006d3dd In order to successfully build, go back to ralloc 2016-12-21 21:57:43 -07:00
Jeremy Soller
2ca1f0b3b3 Switch back to alloc_system 2016-12-20 18:09:19 -07:00
Jeremy Soller
01157e6b3c Link openlibm only in libstd 2016-12-20 14:30:27 -07:00
Alex Crichton
cade120da3 Rollup merge of #38463 - japaric:asm-args, r=alexcrichton
target spec: add an asm-args field to pass arguments to the external ..

assembler

The main use case is the (still out of tree) msp430 target. For that target we use an external assembler, `mps430-elf-gcc`, to produce object files from the assembly rustc/llvm outputs. The problem is that by default `msp430-elf-gcc` produces object files for the MSP430**X** ABI but we want to use produce objects using the MSP430 (note: no X) ABI. To do that we have to pass `-mcpu=msp430` to the assembler and that's what this flag is for.

r? @alexcrichton
cc @pftbest
2016-12-20 12:59:07 -08:00
Jorge Aparicio
bd85a6dbe7 target spec: add an asm-args field to pass arguments to the external ..
assembler
2016-12-18 22:25:46 -05:00
Ralph Giles
9e01f76349 rustc: Link to Android ABI requirements.
Hopefully these references will be stable and provide guidance
when requirements change in the future.
2016-12-16 11:27:12 -08:00
Ralph Giles
e900f6c7fe rustc: Disable NEON on armv7 android.
We thought Google's ABI for arvm7 required neon, but it is
currently optional, perhaps because there is a significant
population of Tegra 2 devices still in use.

This turns off neon code generation outside #[target-feature]
blocks just like we do on armv7-unknown-linux-gnu, but unlike
most other armv7 targets. LLVM defaults to +neon for this target,
so an explicit disable is necessary.

See https://developer.android.com/ndk/guides/abis.html#v7a
for instruction set extension requirements.

Closes #38402.
2016-12-16 10:54:48 -08:00
Jeremy Soller
07e313de2c Add openlibm to redox 2016-12-15 16:33:24 -07:00
Jeremy Soller
773a0a2edb Add start functions, switch allocation crate to ralloc 2016-12-15 16:33:23 -07:00
Jeremy Soller
f86e014627 Use alloc_system as default allocation crate 2016-12-15 16:31:00 -07:00
Jeremy Soller
d2707aa1b9 Use panic abort by default 2016-12-15 16:31:00 -07:00
Jeremy Soller
a621d1270b Fix issue with setting cfg(unix) 2016-12-15 16:31:00 -07:00
Jeremy Soller
c7aa2843b3 Fix typo 2016-12-15 16:31:00 -07:00
Jeremy Soller
341d2d1923 Add redox target 2016-12-15 16:31:00 -07:00
bors
2190f6c3c2 Auto merge of #38086 - semarie:openbsd-i686, r=alexcrichton
Add i686-unknown-openbsd target.

It is a preliminary work. I still have some tests failing, but I have a working rustc binary which is able to rebuild itself.

an update of libc should be required too, but I dunno how to do it with vendor/ layout.

r? @alexcrichton
2016-12-04 16:35:09 +00:00
Sébastien Marie
6774e7aa92 OpenBSD under x86 has particular ABI for returning a struct.
It is like OSX or Windows: small structs are returned as integers.
2016-12-04 07:18:56 +01:00
Alex Crichton
2186660b51 Update the bootstrap compiler
Now that we've got a beta build, let's use it!
2016-11-30 10:38:08 -08:00
Sébastien Marie
75927569fb Add i686-unknown-openbsd target. 2016-11-30 11:51:54 +01:00
Alex Crichton
06242ff15d rustc: Implement #[link(cfg(..))] and crt-static
This commit is an implementation of [RFC 1721] which adds a new target feature
to the compiler, `crt-static`, which can be used to select how the C runtime for
a target is linked. Most targets dynamically linke the C runtime by default with
the notable exception of some of the musl targets.

[RFC 1721]: https://github.com/rust-lang/rfcs/blob/master/text/1721-crt-static.md

This commit first adds the new target-feature, `crt-static`. If enabled, then
the `cfg(target_feature = "crt-static")` will be available. Targets like musl
will have this enabled by default. This feature can be controlled through the
standard target-feature interface, `-C target-feature=+crt-static` or
`-C target-feature=-crt-static`.

Next this adds an gated and unstable `#[link(cfg(..))]` feature to enable the
`crt-static` semantics we want with libc. The exact behavior of this attribute
is a little squishy, but it's intended to be a forever-unstable
implementation detail of the liblibc crate.

Specifically the `#[link(cfg(..))]` annotation means that the `#[link]`
directive is only active in a compilation unit if that `cfg` value is satisfied.
For example when compiling an rlib, these directives are just encoded and
ignored for dylibs, and all staticlibs are continued to be put into the rlib as
usual. When placing that rlib into a staticlib, executable, or dylib, however,
the `cfg` is evaluated *as if it were defined in the final artifact* and the
library is decided to be linked or not.

Essentially, what'll happen is:

* On MSVC with `-C target-feature=-crt-static`, the `msvcrt.lib` library will be
  linked to.
* On MSVC with `-C target-feature=+crt-static`, the `libcmt.lib` library will be
  linked to.
* On musl with `-C target-feature=-crt-static`, the object files in liblibc.rlib
  are removed and `-lc` is passed instead.
* On musl with `-C target-feature=+crt-static`, the object files in liblibc.rlib
  are used and `-lc` is not passed.

This commit does **not** include an update to the liblibc module to implement
these changes. I plan to do that just after the 1.14.0 beta release is cut to
ensure we get ample time to test this feature.

cc #37406
2016-11-16 07:00:09 -08:00
Jorge Aparicio
a6a2477986 use write::run_assembler 2016-11-12 17:45:15 -05:00
Jorge Aparicio
fcde9904db use msp430-as to emit object files from the assembly that LLVM emits 2016-11-12 17:33:35 -05:00
Eduard-Mihai Burtescu
8d2da2bc7e Rollup merge of #37615 - atilag:armv5te-support, r=alexcrichton
Add support for ARMv5TE architecture
2016-11-12 10:38:40 +02:00
Juan Gomez
365ea800bd Set max_atomic_width to 0 because there's no atomic instructions on ARMv5 2016-11-10 10:53:44 +01:00
Tim Neumann
9bae00332c use arm abi blacklist for aarch64 fuchsia 2016-11-06 20:41:46 +01:00
Juan Gomez
8016dc39aa Add support for ARMv5TE architecture 2016-11-06 13:06:01 +01:00
iirelu
e593c3b893 Changed most vec! invocations to use square braces
Most of the Rust community agrees that the vec! macro is clearer when
called using square brackets [] instead of regular brackets (). Most of
these ocurrences are from before macros allowed using different types of
brackets.

There is one left unchanged in a pretty-print test, as the pretty
printer still wants it to have regular brackets.
2016-10-31 22:51:40 +00:00
Michael Woerister
a2a2763e6d Replace all uses of SHA-256 with BLAKE2b. 2016-10-30 19:14:18 -04:00
bors
aef5ca5590 Auto merge of #37392 - alexcrichton:more-disable-jemalloc, r=brson
Disable jemalloc on aarch64/powerpc

Sounds like jemalloc is broken on systems which differ in page size than the
host it was compiled on (unless an option was passed). This unfortunately
reduces the portability of binaries created and can often make Rust segfault by
default. For now let's patch over this by disabling jemalloc until we can figure
out a better solution.

Closes #36994
Closes #37320
cc jemalloc/jemalloc#467
2016-10-30 03:31:00 -07:00
bors
5db21c3af6 Auto merge of #37387 - raphlinus:fuchsia_aarch64, r=alexcrichton
Support for aarch64 architecture on Fuchsia

This patch adds support for the aarch64-unknown-fuchsia target. Also
updates src/liblibc submodule to include required libc change.
2016-10-29 00:28:39 -07:00
Alex Crichton
de80670f74 Disable jemalloc on aarch64/powerpc
Sounds like jemalloc is broken on systems which differ in page size than the
host it was compiled on (unless an option was passed). This unfortunately
reduces the portability of binaries created and can often make Rust segfault by
default. For now let's patch over this by disabling jemalloc until we can figure
out a better solution.

Closes #36994
Closes #37320
cc jemalloc/jemalloc#467
2016-10-27 08:08:33 -07:00
bors
586a988313 Auto merge of #36421 - TimNN:check-abis, r=alexcrichton
check target abi support

This PR checks for each extern function / block whether the ABI / calling convention used is supported by the current target.

This was achieved by adding an `abi_blacklist` field to the target specifications, listing the calling conventions unsupported for that target.
2016-10-25 21:49:59 -07:00
Raph Levien
c4651dba5f Support for aarch64 architecture on Fuchsia
This patch adds support for the aarch64-unknown-fuchsia target. Also
updates src/liblibc submodule to include required libc change.
2016-10-24 16:58:35 -07:00
Tim Neumann
9eb0fd98c6 check target abi support 2016-10-24 15:59:53 +02:00
Raph Levien
69d7884a1d Fix tidy warning
Prefer FIXME to TODO
2016-10-22 07:08:07 -07:00
Raph Levien
76bac5d33e Add Fuchsia support
Adds support for the x86_64-unknown-fuchsia target, which covers the
Fuchsia operating system.
2016-10-22 07:08:06 -07:00
Nick Cameron
9bc6d26092 Stabilise ?
cc [`?` tracking issue](https://github.com/rust-lang/rust/issues/31436)
2016-10-12 08:40:22 +13:00
bors
1a41928045 Auto merge of #36933 - alexcrichton:less-neon-again, r=eddyb
rustc: Try again to disable NEON on armv7 linux

This is a follow-up to #35814 which apparently didn't disable it hard enough. It
looks like LLVM's default armv7 target enables NEON so we'd otherwise have to
pass `-neon`, but we're already enabling armv7 with `+v7` supposedly, so let's
try just telling LLVM that the armv7 target is arm and then enable features
selectively.

Closes #36913
2016-10-04 13:23:09 -07:00
Alex Crichton
4625642211 rustc: Try again to disable NEON on armv7 linux
This is a follow-up to #35814 which apparently didn't disable it hard enough. It
looks like LLVM's default armv7 target enables NEON so we'd otherwise have to
pass `-neon`, but we're already enabling armv7 with `+v7` supposedly, so let's
try just telling LLVM that the armv7 target is arm and then enable features
selectively.

Closes #36913
2016-10-04 09:26:57 -07:00
Jorge Aparicio
6136069609 change max_atomic_width type from u64 to Option<u64>
to better express the idea that omitting this field defaults this value
to target_pointer_width
2016-10-03 23:45:40 -05:00
Jorge Aparicio
251f04e90d fix: "abort" -> PanicStrategy 2016-10-03 22:54:59 -05:00
Jorge Aparicio
470eff75df add a reference about the stated FP facts 2016-10-03 22:34:33 -05:00
Jorge Aparicio
cbc56f16b4 add +d16 and +fp-only-sp to thumbv7em-none-eabihf and documentation 2016-10-03 22:28:40 -05:00
Jorge Aparicio
6d0b8aeb97 set panic-strategy to abort 2016-10-02 15:55:49 -05:00
Jorge Aparicio
396b757fc3 set relocation-model to static 2016-10-02 15:53:28 -05:00
Jorge Aparicio
901c5f2aa4 add Thumbs to the compiler
this commit adds 4 new target definitions to the compiler for easier
cross compilation to ARM Cortex-M devices.

- `thumbv6m-none-eabi`
  - For the Cortex-M0, Cortex-M0+ and Cortex-M1
  - This architecture doesn't have hardware support (instructions) for
    atomics. Hence, the `Atomic*` structs are not available for this
    target.
- `thumbv7m-none-eabi`
  - For the Cortex-M3
- `thumbv7em-none-eabi`
  - For the FPU-less variants of the Cortex-M4 and Cortex-M7
  - On this target, all the floating point operations will be lowered
    software routines (intrinsics)
- `thumbv7em-none-eabihf`
  - For the variants of the Cortex-M4 and Cortex-M7 that do have a FPU.
  - On this target, all the floating point operations will be lowered
    to hardware instructions

No binary releases of standard crates, like `core`, are planned for
these targets because Cargo, in the future, will compile e.g. the `core`
crate on the fly as part of the `cargo build` process. In the meantime,
you'll have to compile the `core` crate yourself. [Xargo] is the easiest
way to do that as in handles the compilation of `core` automatically and
can be used just like Cargo: `xargo build --target thumbv6m-none-eabi`
is all that's needed.

[Xargo]: https://crates.io/crates/xargo
2016-10-02 15:52:26 -05:00
Manish Goregaokar
3821811c49 Rollup merge of #36865 - kallisti5:master, r=brson
Haiku: Fix target triplet delimiter
2016-10-01 16:38:32 +05:30