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Author SHA1 Message Date
Stuart Cook
a6e8a31b86
Rollup merge of #151611 - bonega:improve-is-slice-is-ascii-performance, r=folkertdev
Improve is_ascii performance on x86_64 with explicit SSE2 intrinsics

# Summary

Improves `slice::is_ascii` performance for SSE2 target roughly 1.5-2x on larger inputs.
AVX-512 keeps similiar performance characteristics.

This is building on the work already merged in rust-lang/rust#151259.
In particular this PR improves the default SSE2 performance, I don't consider this a temporary fix anymore.
Thanks to @folkertdev for pointing me to consider `as_chunk` again.

# The implementation:
- Uses 64-byte chunks with 4x 16-byte SSE2 loads OR'd together
- Extracts the MSB mask with a single `pmovmskb` instruction
- Falls back to usize-at-a-time SWAR for inputs < 64 bytes

# Performance impact (vs before rust-lang/rust#151259):
- AVX-512: 34-48x faster
- SSE2: 1.5-2x faster

  <details>
  <summary>Benchmark Results (click to expand)</summary>

  Benchmarked on AMD Ryzen 9 9950X (AVX-512 capable). Values show relative performance (1.00 = fastest).
  Tops out at 139GB/s for large inputs.

  ### early_non_ascii

  | Input Size | new_avx512 | new_sse2 | old_avx512 | old_sse2 |
  |------------|------------|----------|------------|----------|
  | 64 | 1.01 | **1.00** | 13.45 | 1.13 |
  | 1024 | 1.01 | **1.00** | 13.53 | 1.14 |
  | 65536 | 1.01 | **1.00** | 13.99 | 1.12 |
  | 1048576 | 1.02 | **1.00** | 13.29 | 1.12 |

  ### late_non_ascii

  | Input Size | new_avx512 | new_sse2 | old_avx512 | old_sse2 |
  |------------|------------|----------|------------|----------|
  | 64 | **1.00** | 1.01 | 13.37 | 1.13 |
  | 1024 | 1.10 | **1.00** | 42.42 | 1.95 |
  | 65536 | **1.00** | 1.06 | 42.22 | 1.73 |
  | 1048576 | **1.00** | 1.03 | 34.73 | 1.46 |

  ### pure_ascii

  | Input Size | new_avx512 | new_sse2 | old_avx512 | old_sse2 |
  |------------|------------|----------|------------|----------|
  | 4 | 1.03 | **1.00** | 1.75 | 1.32 |
  | 8 | **1.00** | 1.14 | 3.89 | 2.06 |
  | 16 | **1.00** | 1.04 | 1.13 | 1.62 |
  | 32 | 1.07 | 1.19 | 5.11 | **1.00** |
  | 64 | **1.00** | 1.13 | 13.32 | 1.57 |
  | 128 | **1.00** | 1.01 | 19.97 | 1.55 |
  | 256 | **1.00** | 1.02 | 27.77 | 1.61 |
  | 1024 | **1.00** | 1.02 | 41.34 | 1.84 |
  | 4096 | 1.02 | **1.00** | 45.61 | 1.98 |
  | 16384 | 1.01 | **1.00** | 48.67 | 2.04 |
  | 65536 | **1.00** | 1.03 | 43.86 | 1.77 |
  | 262144 | **1.00** | 1.06 | 41.44 | 1.79 |
  | 1048576 | 1.02 | **1.00** | 35.36 | 1.44 |

  </details>

## Reproduction / Test Projects

Standalone validation tools: https://github.com/bonega/is-ascii-fix-validation

- `bench/` - Criterion benchmarks for SSE2 vs AVX-512 comparison
- `fuzz/` - Compares old/new implementations with libfuzzer

Relates to: https://github.com/llvm/llvm-project/issues/176906
2026-01-26 14:36:21 +11:00
bors
873d4682c7 Auto merge of #151337 - the8472:bail-before-memcpy2, r=Mark-Simulacrum
optimize `vec.extend(slice.to_vec())`, take 2

Redoing https://github.com/rust-lang/rust/pull/130998
It was reverted in https://github.com/rust-lang/rust/pull/151150 due to flakiness. I have traced this to layout randomization perturbing the test (the failure reproduces locally with layout randomization), which is now excluded.
2026-01-25 19:45:35 +00:00
Andreas Liljeqvist
dbc870afec Mark is_ascii_sse2 as #[inline] 2026-01-25 20:05:08 +01:00
bors
38c71295e8 Auto merge of #151646 - matthiaskrgr:rollup-HPnXGA3, r=matthiaskrgr
Rollup of 2 pull requests

Successful merges:

 - rust-lang/rust#151404 (LoongArch: Fix direct-access-external-data test)
 - rust-lang/rust#151405 (LoongArch: Fix call-llvm-intrinsics test)
2026-01-25 16:31:05 +00:00
Matthias Krüger
0de96f455d
Rollup merge of #151405 - heiher:fix-cli, r=Mark-Simulacrum
LoongArch: Fix call-llvm-intrinsics test
2026-01-25 16:27:23 +01:00
Matthias Krüger
f6a8326a99
Rollup merge of #151404 - heiher:fix-dae, r=Mark-Simulacrum
LoongArch: Fix direct-access-external-data test

On LoongArch targets, `-Cdirect-access-external-data` defaults to `no`. Since copy relocations are not supported, `dso_local` is not emitted under `-Crelocation-model=static`, unlike on other targets.
2026-01-25 16:27:22 +01:00
bors
9415853279 Auto merge of #151556 - eggyal:unused-assignment-to-unused-variable, r=cjgillot
Fix suppression of `unused_assignment` in binding of `unused_variable`

Unused assignments to an unused variable should trigger only the `unused_variables` lint and not also the `unused_assignments` lint. This was previously implemented by checking whether the span of the assignee was within the span of the binding pattern, however that failed to capture situations was imported from elsewhere (eg from the input tokenstream of a proc-macro that generates the binding pattern).

By comparing the span of the assignee to those of the variable introductions instead, a reported stable-to-stable regression is resolved.

This fix also impacted some other preexisting tests, which had (undesirably) been triggering both the `unused_variables` and `unused_assignments` lints on the same initializing assignment; those tests have therefore now been updated to expect only the former lint.

Fixes rust-lang/rust#151514
r? cjgillot (as author of reworked liveness testing in rust-lang/rust#142390)
2026-01-25 13:10:32 +00:00
bors
4d38622e8b Auto merge of #151634 - matthiaskrgr:rollup-cE0JR24, r=matthiaskrgr
Rollup of 10 pull requests

Successful merges:

 - rust-lang/rust#145393 (Add codegen test for removing trailing zeroes from `NonZero`)
 - rust-lang/rust#148764 (ptr_aligment_type: add more APIs)
 - rust-lang/rust#149869 (std: avoid tearing `dbg!` prints)
 - rust-lang/rust#150065 (add CSE optimization tests for iterating over slice)
 - rust-lang/rust#150842 (Fix(lib/win/thread): Ensure `Sleep`'s usage passes over the requested duration under Win7)
 - rust-lang/rust#151505 (Various refactors to the proc_macro bridge)
 - rust-lang/rust#151560 (relnotes: fix 1.93's `as_mut_array` methods)
 - rust-lang/rust#151317 (x86 soft-float feature: mark it as forbidden rather than unstable)
 - rust-lang/rust#151577 (Rename `DepKindStruct` to `DepKindVTable`)
 - rust-lang/rust#151620 (Fix 'the the' typo in library/core/src/array/iter.rs)
2026-01-25 09:56:27 +00:00
Andreas Liljeqvist
cbcd8694c6 Remove x86_64 assembly test for is_ascii
The SSE2 helper function is not inlined across crate boundaries,
so we cannot verify the codegen in an assembly test. The fix is
still verified by the absence of performance regression.
2026-01-25 09:44:04 +01:00
Matthias Krüger
d83f2ebea5
Rollup merge of #151620 - vinDelphini:fix-typo-library-core, r=joboet
Fix 'the the' typo in library/core/src/array/iter.rs

This PR fixes a small grammatical error in a safety comment within `library/core/src/array/iter.rs` where the word "the" was duplicated.

No functional changes.
2026-01-25 07:43:01 +01:00
Matthias Krüger
119eea2b79
Rollup merge of #151577 - Zalathar:dep-kind-vtable, r=Kivooeo
Rename `DepKindStruct` to `DepKindVTable`

This type is used by dependency-tracking code in the query system, for looking up function pointers and other metadata associated with a particular `DepKind`.

Calling it “struct” is not particularly helpful, whereas calling it a “vtable” at least gives some basic intuition for what it is and how it is used.

Some associated identifiers have also drifted a bit over time, and this PR adjusts those as well.

There should be no change to compiler behaviour.

r? nnethercote (or compiler)
2026-01-25 07:43:01 +01:00
Matthias Krüger
17ba7f246e
Rollup merge of #151317 - RalfJung:x86-soft-float, r=workingjubilee
x86 soft-float feature: mark it as forbidden rather than unstable

I am not sure why I made it "unstable" in f755f4cd1a; I think at the time "forbidden" did not work for some reason.

Making it "forbidden" instead has no significant effect on `-Ctarget-feature` use, it just changes the warning. It *does* have the effect that one cannot query this using `cfg(target_feature)` on nightly any more, but that seems fine to me. It only ever worked as an accidental side-effect of f755f4cd1a anyway.

r? @workingjubilee
2026-01-25 07:43:01 +01:00
Matthias Krüger
93d5b4f1f0
Rollup merge of #151560 - cuviper:relnotes-as_mut_array, r=Mark-Simulacrum
relnotes: fix 1.93's `as_mut_array` methods

The links are correct, but text typoed `as_array_mut`.
2026-01-25 07:43:00 +01:00
Matthias Krüger
996992eced
Rollup merge of #151505 - bjorn3:proc_macro_refactors, r=petrochenkov,Kobzol
Various refactors to the proc_macro bridge

This reduces the amount of types, traits and other abstractions that are involved with the bridge, which should make it easier to understand and modify. This should also help a bit with getting rid of the type marking hack, which is complicating the code a fair bit.

Fixes: rust-lang/rust#139810
2026-01-25 07:43:00 +01:00
Matthias Krüger
38504731be
Rollup merge of #150842 - PaulDance:patches/fix-win7-sleep, r=Mark-Simulacrum
Fix(lib/win/thread): Ensure `Sleep`'s usage passes over the requested duration under Win7

Fixes rust-lang/rust#149935. See the added comment for more details.

This makes the concerned test now reproducibly pass, for us at least. Also, testing this separately revealed successful: see the issue.

@rustbot label C-bug I-flaky-test O-windows-7 T-libs A-time A-thread
2026-01-25 07:42:59 +01:00
Matthias Krüger
9dffb21112
Rollup merge of #150065 - is57primenumber:add-slice-cse-test, r=Mark-Simulacrum
add CSE optimization tests for iterating over slice

This PR is regression test for issue rust-lang/rust#119573.
This PR introduces a new regression test to verify a critical optimization known as Common Subexpression Elimination (CSE) is correctly applied during various slice iteration patterns.
2026-01-25 07:42:59 +01:00
Matthias Krüger
cc666ba8f4
Rollup merge of #149869 - joboet:torn-dbg, r=Mark-Simulacrum
std: avoid tearing `dbg!` prints

Fixes https://github.com/rust-lang/rust/issues/136703.

This is an alternative to rust-lang/rust#149859. Instead of formatting everything into a string, this PR makes multi-expression `dbg!` expand into multiple nested matches, with the final match containing a single `eprint!`. By using macro recursion and relying on hygiene, this allows naming every bound value in that `eprint!`.

CC @orlp

r? libs
2026-01-25 07:42:58 +01:00
Matthias Krüger
2da5959600
Rollup merge of #148764 - GrigorenkoPV:aligment_api, r=scottmcm
ptr_aligment_type: add more APIs

As per https://github.com/rust-lang/rust/issues/102070#issuecomment-1650043557

Tracking issue: rust-lang/rust#102070

Mostly duplicating methods that previously worked with `usize`-represented alignments.

Naming follows a convention of `align: usize`, `alignment: Alignment`.
2026-01-25 07:42:57 +01:00
Matthias Krüger
b651be2191
Rollup merge of #145393 - clubby789:issue-138497, r=Mark-Simulacrum
Add codegen test for removing trailing zeroes from `NonZero`

Closes rust-lang/rust#138497
2026-01-25 07:42:56 +01:00
bors
75963ce795 Auto merge of #151065 - nagisa:add-preserve-none-abi, r=petrochenkov
abi: add a rust-preserve-none calling convention

This is the conceptual opposite of the rust-cold calling convention and is particularly useful in combination with the new `explicit_tail_calls` feature.

For relatively tight loops implemented with tail calling (`become`) each of the function with the regular calling convention is still responsible for restoring the initial value of the preserved registers. So it is not unusual to end up with a situation where each step in the tail call loop is spilling and reloading registers, along the lines of:

    foo:
        push r12
        ; do things
        pop r12
        jmp next_step

This adds up quickly, especially when most of the clobberable registers are already used to pass arguments or other uses.

I was thinking of making the name of this ABI a little less LLVM-derived and more like a conceptual inverse of `rust-cold`, but could not come with a great name (`rust-cold` is itself not a great name: cold in what context? from which perspective? is it supposed to mean that the function is rarely called?)
2026-01-25 02:49:32 +00:00
bors
5a07626f4b Auto merge of #151615 - matthiaskrgr:rollup-2WQ1USJ, r=matthiaskrgr
Rollup of 11 pull requests

Successful merges:

 - rust-lang/rust#149962 (Promote powerpc64-unknown-linux-musl to tier 2 with host tools)
 - rust-lang/rust#150138 (Add new Tier 3 targets for ARMv6)
 - rust-lang/rust#150905 (Fix(lib/win/net): Remove hostname support under Win7)
 - rust-lang/rust#151094 (remote-test-server: Fix compilation on UEFI targets)
 - rust-lang/rust#151346 (add `simd_splat` intrinsic)
 - rust-lang/rust#151353 (compiletest: Make `aux-crate` directive explicitly handle `--extern` modifiers)
 - rust-lang/rust#151538 (std: `sleep_until` on Motor and VEX)
 - rust-lang/rust#151098 (Add Korean translation to Rust By Example)
 - rust-lang/rust#151157 (Extend build-manifest local test guide)
 - rust-lang/rust#151403 (std: use 64-bit `clock_nanosleep` on GNU/Linux if available)
 - rust-lang/rust#151571 (Fix cstring-merging test for Hexagon target)
2026-01-24 22:26:32 +00:00
vinDelphini
a06fdc1806 Fix 'the the' typo in library/core/src/array/iter.rs 2026-01-25 03:37:57 +05:30
Andreas Liljeqvist
a72f68e801 Fix is_ascii performance on x86_64 with explicit SSE2 intrinsics
Use explicit SSE2 intrinsics to avoid LLVM's broken AVX-512
auto-vectorization which generates ~31 kshiftrd instructions.

Performance
- AVX-512: 34-48x faster
- SSE2: 1.5-2x faster

Improves on earlier pr
2026-01-24 22:03:58 +01:00
Matthias Krüger
c11be675f4
Rollup merge of #151571 - androm3da:bcain/cstr_merge, r=tgross35
Fix cstring-merging test for Hexagon target

Hexagon assembler uses `.string` directive instead of `.asciz` for null-terminated strings. Both are equivalent but the test was only checking for `.asciz`.

Update the CHECK patterns to accept both directives using `.{{asciz|string}}` regex pattern.
2026-01-24 21:04:17 +01:00
Matthias Krüger
f6cc562026
Rollup merge of #151403 - joboet:clock_nanosleep_time64, r=Mark-Simulacrum
std: use 64-bit `clock_nanosleep` on GNU/Linux if available

glibc 2.31 added support for both 64-bit `clock_gettime` and 64-bit `clock_nanosleep`. Thus, if [`__clock_nanosleep_time64`](https://sourceware.org/git/?p=glibc.git;a=blob;f=include/time.h;h=22b29ca583549488a0e5395cb820f55ec6e38e5f;hb=e14a91e59d35bf2fa649a9726ccce838b8c6e4b7#l322) and the underlying syscall are available, use them for implementing `sleep_until` to avoid having to fall back to `nanosleep` for long-duration sleeps.
2026-01-24 21:04:17 +01:00
Matthias Krüger
9a06ab5ce7
Rollup merge of #151157 - Kobzol:build-manifest, r=Mark-Simulacrum
Extend build-manifest local test guide

Fill in more blanks about how to test build-manifest changes with Rustup.

Figured this out while working on https://github.com/rust-lang/rust/pull/151156, with the help of bjorn3.
2026-01-24 21:04:16 +01:00
Matthias Krüger
7dc32efb16
Rollup merge of #151098 - partrita:main, r=Mark-Simulacrum
Add Korean translation to Rust By Example

Hello,

I’ve added a Korean translation file to Rust By Example.
This contribution will help Korean readers learn Rust more easily by providing localized explanations and examples.

Please review the proposed additions when you have time.

Thanks in advance for your time and review! 🙏

Add Korean translation. Thanks in advance.
2026-01-24 21:04:16 +01:00
Matthias Krüger
275ffd55b5
Rollup merge of #151538 - joboet:sleep_more, r=Mark-Simulacrum
std: `sleep_until` on Motor and VEX

This PR:
* Forwards the public `sleep_until` to the private `sleep_until` on Motor OS
* Adds a `sleep_until` implementation on VEX that yields until the deadline has passed

CC @lasiotus
CC @lewisfm @tropicaaal @Gavin-Niederman @max-niederman
2026-01-24 21:04:16 +01:00
Matthias Krüger
0a1b437760
Rollup merge of #151353 - Enselic:aux-crate-opts, r=Zalathar
compiletest: Make `aux-crate` directive explicitly handle `--extern` modifiers

With `-Zunstable-options` it is possible to pass options to `--extern`. See here for an exhaustive list of possible options:
b5dd72d292/compiler/rustc_session/src/config.rs (L2356-L2367)

Using these options works with the `aux-crate` directive, but only because the options pretend to be part of the name. Make it clearer what `aux-crate` supports by explicitly handling `--extern` options.

This PR is step one of splitting up https://github.com/rust-lang/rust/pull/151258 into smaller pieces.

r? @Zalathar
2026-01-24 21:04:15 +01:00
Matthias Krüger
3a69035338
Rollup merge of #151346 - folkertdev:simd-splat, r=workingjubilee
add `simd_splat` intrinsic

Add `simd_splat` which lowers to the LLVM canonical splat sequence.

```llvm
insertelement <N x elem> poison, elem %x, i32 0
shufflevector <N x elem> v0, <N x elem> poison, <N x i32> zeroinitializer
```

Right now we try to fake it using one of

```rust
fn splat(x: u32) -> u32x8 {
    u32x8::from_array([x; 8])
}
```

or (in `stdarch`)

```rust
fn splat(value: $elem_type) -> $name {
    #[derive(Copy, Clone)]
    #[repr(simd)]
    struct JustOne([$elem_type; 1]);
    let one = JustOne([value]);
    // SAFETY: 0 is always in-bounds because we're shuffling
    // a simd type with exactly one element.
    unsafe { simd_shuffle!(one, one, [0; $len]) }
}
```

Both of these can confuse the LLVM optimizer, producing sub-par code. Some examples:

- https://github.com/rust-lang/rust/issues/60637
- https://github.com/rust-lang/rust/issues/137407
- https://github.com/rust-lang/rust/issues/122623
- https://github.com/rust-lang/rust/issues/97804

---

As far as I can tell there is no way to provide a fallback implementation for this intrinsic, because there is no `const` way of evaluating the number of elements (there might be issues beyond that, too). So, I added implementations for all 4 backends.

Both GCC and const-eval appear to have some issues with simd vectors containing pointers. I have a workaround for GCC, but haven't yet been able to make const-eval work. See the comments below.

Currently this just adds the intrinsic, it does not actually use it anywhere yet.
2026-01-24 21:04:15 +01:00
Matthias Krüger
99c44496ed
Rollup merge of #151094 - nicholasbishop:bishop-fix-server-uefi-compilation, r=Mark-Simulacrum
remote-test-server: Fix compilation on UEFI targets

Tested with:
./x build src/tools/remote-test-server --target x86_64-unknown-uefi
2026-01-24 21:04:14 +01:00
Matthias Krüger
fd5f48f559
Rollup merge of #150905 - PaulDance:patches/unsupport-win7-hostname, r=Mark-Simulacrum
Fix(lib/win/net): Remove hostname support under Win7

Fixes rust-lang/rust#150896. `GetHostNameW` is not available under Windows 7, leading to dynamic linking failures upon program executions. For now, as it is still unstable, this therefore appropriately cfg-gates the feature in order to mark the Win7 as unsupported with regards to this particular feature. Porting the functionality for Windows 7 would require changing the underlying system call and so more work for the immediate need.

@rustbot label C-bug O-windows-7 T-libs A-io
2026-01-24 21:04:14 +01:00
Matthias Krüger
00236a0d3d
Rollup merge of #150138 - thejpster:add-armv6-bare-metal, r=madsmtm,davidtwco,wesleywiser
Add new Tier 3 targets for ARMv6

Adds three new targets to support ARMv6 processors running bare-metal:

* `armv6-none-eabi` - Arm ISA, soft-float
* `armv6-none-eabihf` - Arm ISA, hard-float
* `thumbv6-none-eabi` - Thumb-1 ISA, soft-float

There is no `thumbv6-none-eabihf` target because as far as I can tell, hard-float isn't support with the Thumb-1 instruction set (and you need the ARMv6T2 extension to enable Thumb-2 support).

The targets require ARMv6K as a minimum, which allows the two Arm ISA targets to have full CAS atomics. LLVM has a bug which means it emits some ARMv6K instructions even if you only call for ARMv6, and as no-one else has noticed the bug, and because basically all ARMv6 processors have ARMv6K, I think this is fine. The Thumb target also doesn't have any kind of atomics, just like the Armv5TE and Armv4 targets, because LLVM was emitting library calls to emulate them.

Testing will be added to https://github.com/rust-embedded/aarch32 once the target is accepted. I already have tests for the other non-M arm-none-eabi targets, and those tests pass on these targets.

> A tier 3 target must have a designated developer or developers (the "target maintainers") on record to be CCed when issues arise regarding the target. (The mechanism to track and CC such developers may evolve over time.)

I have listed myself. If accepted, I'll talk to the Embedded Devices Working Group about adding this one to the rosta with all the others they support.

> Targets must use naming consistent with any existing targets; for instance, a target for the same CPU or OS as an existing Rust target should use the same name for that CPU or OS. Targets should normally use the same names and naming conventions as used elsewhere in the broader ecosystem beyond Rust (such as in other toolchains), unless they have a very good reason to diverge. Changing the name of a target can be highly disruptive, especially once the target reaches a higher tier, so getting the name right is important even for a tier 3 target.

You might prefer `arm-none-eabi`, because `arm-unknown-linux-gnu` is an ARMv6 target - the implicit rule seems to be that if the Arm architecture version isn't specified, it's assumed to be v6. However, `armv6-none-eabi` seemed to fit better between `armv5te-none-eabi` and `armv7a/armv7r-none-eabi`.

The hamming distance between `thumbv6-none-eabi` and `thumbv6m-none-eabi` is unfortunately low, but I don't know how to make it better. They *are* the ARMv6 and ARMv6-M targets, and its perhaps not worse than `armv7a-none-eabi` and `armv7r-none-eabi`.

> Tier 3 targets may have unusual requirements to build or use, but must not create legal issues or impose onerous legal terms for the Rust project or for Rust developers or users.

No different to any other arm-none-eabi target.

> Neither this policy nor any decisions made regarding targets shall create any binding agreement or estoppel by any party. If any member of an approving Rust team serves as one of the maintainers of a target, or has any legal or employment requirement (explicit or implicit) that might affect their decisions regarding a target, they must recuse themselves from any approval decisions regarding the target's tier status, though they may otherwise participate in discussions.

Noted.

> Tier 3 targets should attempt to implement as much of the standard libraries as possible and appropriate...

Same as other arm-none-eabi targets.

> The target must provide documentation for the Rust community explaining how to build for the target, using cross-compilation if possible.

Same as other arm-none-eabi targets.

> Tier 3 targets must not impose burden on the authors of pull requests, or other developers in the community, to maintain the target. In particular, do not post comments (automated or manual) on a PR that derail or suggest a block on the PR based on a tier 3 target. Do not send automated messages or notifications (via any medium, including via @) to a PR author or others involved with a PR regarding a tier 3 target, unless they have opted into such messages.

Noted.

> Patches adding or updating tier 3 targets must not break any existing tier 2 or tier 1 target, and must not knowingly break another tier 3 target without approval of either the compiler team or the maintainers of the other tier 3 target.

Noted

> Tier 3 targets must be able to produce assembly using at least one of rustc's supported backends from any host target. (Having support in a fork of the backend is not sufficient, it must be upstream.)

Noted
2026-01-24 21:04:13 +01:00
Matthias Krüger
df4fe869ce
Rollup merge of #149962 - Gelbpunkt:powerpc64-musl-tier-2, r=Mark-Simulacrum
Promote powerpc64-unknown-linux-musl to tier 2 with host tools

MCP: https://github.com/rust-lang/compiler-team/issues/946

Tested by compiling on an x86_64 host via `DEPLOY=1 ./src/ci/docker/run.sh dist-powerpc64-linux-musl` and running on Alpine Linux ppc64:

```
root@algol /t/rust-nightly-powerpc64-unknown-linux-musl# bash install.sh
install: creating uninstall script at /usr/local/lib/rustlib/uninstall.sh
install: installing component 'rustc'
install: installing component 'rust-std-powerpc64-unknown-linux-musl'
install: installing component 'cargo'
install: installing component 'rustfmt-preview'
install: installing component 'rust-analyzer-preview'
install: installing component 'llvm-tools-preview'
install: installing component 'clippy-preview'
install: installing component 'miri-preview'
install: installing component 'rust-analysis-powerpc64-unknown-linux-musl'
install: installing component 'llvm-bitcode-linker-preview'

    rust installed.

root@algol /t/rust-nightly-powerpc64-unknown-linux-musl# echo 'fn main() { println!("hello world"); }' > test.rs
root@algol /t/rust-nightly-powerpc64-unknown-linux-musl# which rustc
/usr/local/bin/rustc
root@algol /t/rust-nightly-powerpc64-unknown-linux-musl# rustc test.rs
root@algol /t/rust-nightly-powerpc64-unknown-linux-musl# ./test
hello world
root@algol /t/rust-nightly-powerpc64-unknown-linux-musl# file test
test: ELF 64-bit MSB pie executable, 64-bit PowerPC or cisco 7500, OpenPOWER ELF V2 ABI, version 1 (SYSV), dynamically linked, interpreter /lib/ld-musl-powerpc64.so.1, BuildID[sha1]=90a0fa543b3d42588ad32c5b858e56ac9c56faed, with debug_info, not stripped
```

I renamed the glibc job and created a new one for musl since the same is done for the little-endian targets.

Implements rust-lang/rust#149938

try-job: dist-powerpc64-linux-gnu
try-job: dist-powerpc64-linux-musl
2026-01-24 21:04:13 +01:00
bors
f134bbc78d Auto merge of #151544 - weihanglo:update-cargo, r=weihanglo
Update cargo submodule

14 commits in 85eff7c80277b57f78b11e28d14154ab12fcf643..efcd9f58636c1990393d495159045d9c35e43b8f
2026-01-15 16:18:08 +0000 to 2026-01-23 13:50:59 +0000
- chore(deps): update cargo-semver-checks to v0.46.0 (rust-lang/cargo#16548)
- Increase cache_lock test timeout (rust-lang/cargo#16545)
- iTerm now supports OSC 9;4 (terminal window progress bar) (rust-lang/cargo#16506)
- chore: Updated compiler errors for Rust 1.93 (rust-lang/cargo#16543)
- test(build-std): adjust snapshot (rust-lang/cargo#16539)
- chore: bump to 0.96.0 (rust-lang/cargo#16538)
- fix: update `resolve_all_features()` to filter pkg deps (rust-lang/cargo#16221)
- fix: show implicit_minimum_version_req emitted source once per package (rust-lang/cargo#16535)
- fix: `--remap-path-scope` stabilized in 1.95-nightly (rust-lang/cargo#16536)
- feat(lints): Add non_kebab_case_bin lint  (rust-lang/cargo#16524)
- fix(rm): Suggest table flags when none are specified (rust-lang/cargo#16533)
- fix(patch): clean up patch-related error messages (rust-lang/cargo#16498)
- Store artifact deps in build unit dir (rust-lang/cargo#16519)
- refactor(timings): reuse timing metric collection logic between `--timings` and `-Zbuild-analysis` (rust-lang/cargo#16497)
2026-01-24 19:11:57 +00:00
Jonathan 'theJPster' Pallant
7cc102a4ee Revised yield hints
Turns out v7 targets always have v6t2 set, so that line was redundant. Also add a link to the Arm Armv7 A.R.M.
2026-01-24 17:29:25 +00:00
Jonathan 'theJPster' Pallant
9d9870b735 Fix typo in thumbv4t/v5te README 2026-01-24 17:29:25 +00:00
Jonathan 'theJPster' Pallant
96897f016e Add ARMv6 bare-metal targets
Three targets, covering A32 and T32 instructions, and soft-float and
hard-float ABIs. Hard-float not available in Thumb mode. Atomics
in Thumb mode require __sync* functions from compiler-builtins.
2026-01-24 17:29:25 +00:00
Simonas Kazlauskas
6db94dbc25 abi: add a rust-preserve-none calling convention
This is the conceptual opposite of the rust-cold calling convention and
is particularly useful in combination with the new `explicit_tail_calls`
feature.

For relatively tight loops implemented with tail calling (`become`) each
of the function with the regular calling convention is still responsible
for restoring the initial value of the preserved registers. So it is not
unusual to end up with a situation where each step in the tail call loop
is spilling and reloading registers, along the lines of:

    foo:
        push r12
        ; do things
        pop r12
        jmp next_step

This adds up quickly, especially when most of the clobberable registers
are already used to pass arguments or other uses.

I was thinking of making the name of this ABI a little less LLVM-derived
and more like a conceptual inverse of `rust-cold`, but could not come
with a great name (`rust-cold` is itself not a great name: cold in what
context? from which perspective? is it supposed to mean that the
function is rarely called?)
2026-01-24 19:23:17 +02:00
Martin Nordholts
6f767b6860 compiletest: Make aux-crate directive explicitly handle --extern modifiers
To make it clearer what happens. In other words, do not silently keep
modifiers as part of `AuxCrate::name`.
2026-01-24 16:08:02 +01:00
bors
021fc25b7a Auto merge of #151594 - matthiaskrgr:rollup-sAb1Qar, r=matthiaskrgr
Rollup of 4 pull requests

Successful merges:

 - rust-lang/rust#149174 (`const` blocks as a `mod` item)
 - rust-lang/rust#151282 (THIR patterns: Explicitly distinguish `&pin` from plain `&`/`&mut`)
 - rust-lang/rust#151593 (miri subtree update)
 - rust-lang/rust#151516 (Do not emit errors on non-metaitem diagnostic attr input)

r? @ghost
2026-01-24 14:52:44 +00:00
bjorn3
e8c48c6895 Fix review comments 2026-01-24 14:44:03 +00:00
bjorn3
d9ec1aef8d Get rid of MarkedTypes 2026-01-24 14:44:03 +00:00
bjorn3
8a119c3145 Merge FreeFunctions trait into Server trait
And rename FreeFunctions struct to Methods.
2026-01-24 14:44:03 +00:00
bjorn3
9481890143 Various simplifications after moving all bridge methods to a single type 2026-01-24 14:44:03 +00:00
bjorn3
2f44019470 Move all bridge methods into a single type 2026-01-24 14:44:03 +00:00
bjorn3
4dc28c59ab Expand with_api_handle_types 2026-01-24 14:44:03 +00:00
bjorn3
dabae7eea4 Handle FreeFunctions outside with_api_handle_types
It is a singleton which doesn't actually need to be passed through over
the bridge.
2026-01-24 14:44:03 +00:00
bjorn3
ef819e49a8 Remove a couple of unnecessary impls 2026-01-24 14:44:03 +00:00
bjorn3
eec532020e Disable proc-macro-srv tests on stage 0
They break whenever the proc macro ABI changes due to it building a proc
macro against the bootstrap sysroot.
2026-01-24 14:44:03 +00:00